SBVS343A March   2019  – September 2019 TPS7A78

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical Schematic Half-Bridge Configuration
      2.      Typical Schematic Full-Bridge Configuration
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Active Bridge Control
      2. 7.3.2 Full-Bridge (FB) and Half-Bridge (HB) Configurations
      3. 7.3.3 4:1 Switched-Capacitor Voltage Reduction
      4. 7.3.4 Undervoltage Lockout Circuits (VUVLO_SCIN) and (VUVLO_LDO_IN)
      5. 7.3.5 Dropout Voltage Regulation
      6. 7.3.6 Current Limit
      7. 7.3.7 Programmable Power-Fail Detection
      8. 7.3.8 Power-Good (PG) Detection
      9. 7.3.9 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Mode
      3. 7.4.3 Disabled Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Recommended Capacitor Types
      2. 8.1.2 Input and Output Capacitors Requirements
      3. 8.1.3 Startup Behavior
      4. 8.1.4 Load Transient
      5. 8.1.5 Standby Power and Output Efficiency
      6. 8.1.6 Reverse Current
      7. 8.1.7 Switched-Capacitor Stage Output Impedance
      8. 8.1.8 Power Dissipation (PD)
      9. 8.1.9 Estimating Junction Temperature
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Calculating the Cap-Drop Capacitor CS
          1. 8.2.2.1.1 CS Calculations for the Typical Design
        2. 8.2.2.2 Calculating the Surge Resistor RS
          1. 8.2.2.2.1 RS Calculations for the Typical Design
        3. 8.2.2.3 Checking for the Device Maximum ISHUNT Current
          1. 8.2.2.3.1 ISHUNT Calculations for the Typical Design
        4. 8.2.2.4 Calculating the Bulk Capacitor CSCIN
          1. 8.2.2.4.1 CSCIN Calculations for the Typical Design
        5. 8.2.2.5 Calculating the PFD Pin Resistor Dividers for a Power-Fail Detection
          1. 8.2.2.5.1 PFD Pin Resistor Divider Calculations for the Typical Design
        6. 8.2.2.6 Summary of the Typical Application Design Components
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Evaluation Module
        2. 11.1.1.2 SIMPLIS Model
      2. 11.1.2 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.1.5 Standby Power and Output Efficiency

The AC input current cannot be directly calculated because of the active bridge control; see the Active Bridge Control section. The AC input current through the AC+ and AC– pins is a combination of two current components, as shown in Figure 24: ISHUNT and IPEAK. The ISHUNT current component is identified by its wave profile because this component is the AC charging current supplied by the cap-drop capacitor CS. The IPEAK current component is identified by its instantaneous peak current profile.

TPS7A78 D0018_SBVS343_TPS7A78.gifFigure 24. The Device VAC Input Current With its Two Components

Equation 1 calculates the shunt current ISHUNT, and Equation 2 calculates the peak current IPEAK.

Equation 1. ISHUNT = VAC (MAX) / XCS = VAC (MAX) × 2 × π × ƒ × CS
Equation 2. IPEAK = VSCIN / RS
Equation 3. VSCIN = 4 × (VLDO_OUT (nom) + 0.6 V)

where

  • VAC (MAX) is the maximum VAC supply RMS voltage
  • XCS is the impedance of the standard CS capacitor to be used in the application
  • VSCIN is the rectified DC voltage on the SCIN pin
  • RS is the standard RS resistor to be used in the application

The frequency of the shunt activity is uncorrelated to the AC input frequency. Therefore, the standby power must be measured with a power analyzer. Fortunately, using a power analyzer is relatively simple and the measurement setup shown in Figure 25 and Figure 26 can be used to measure the standby power and the output efficiency.

If the application has an upstream current-limit circuit that limits any high-transient input currents, such as surge or hot-plug currents, the requirement for the surge resistor RS can be relaxed. The input transient current-limit circuit allows the RS resistor to be removed, thus significantly improving the standby power and output efficiency because no power loss is dissipated in RS.

TPS7A78 TPS7A78-Eff1.gifFigure 25. Standby Power and Output Efficiency Measurement Setup
TPS7A78 TPS7A78-Eff2.gifFigure 26. Standby Power and Output Efficiency Measurement Setup With an Upstream Current-Limit Circuit

The standby power and output efficiency measurements shown in Figure 27 to Figure 29 were created with the measurement setup in Figure 25.

TPS7A78 D004_SBVS343_TPS7A78-01.gif
VAC = 120 VRMS at 60 Hz, FB, VLDO_OUT = 5.0 V,
IOUT = 0 mA
Figure 27. Standby Power vs Cap-Drop Capacitor (CS)
TPS7A78 D006_SBVS343_TPS7A78.gif
VAC = 120 VRMS at 60 Hz, HB, CS = 150 nF, VLDO_OUT = 5.0 V
Figure 29. Efficiency vs IOUT HB Configuration
TPS7A78 D005_SBVS343_TPS7A78.gif
VAC = 120 VRMS at 60 Hz, FB, CS = 150 nF, VLDO_OUT = 5.0 V
Figure 28. Efficiency vs IOUT FB Configuration