SLVSDU9C February   2017  – December 2022

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Device Enable (EN)
      2. 7.3.2 Adjustable Power-Good Threshold (PG, PGADJ)
      3. 7.3.3 Adjustable Power-Good Delay Timer (DELAY)
      4. 7.3.4 Undervoltage Shutdown
      5. 7.3.5 Current Limit
      6. 7.3.6 Thermal Shutdown
      7. 7.3.7 Integrated Watchdog
        1. 7.3.7.1 Window Watchdog (WTS, ROSC, FSEL and WRS)
        2. 7.3.7.2 Standard Watchdog (WTS, ROSC and FSEL)
        3. 7.3.7.3 Watchdog Service Signal and Watchdog Fault Outputs (WD and WDO)
        4. 7.3.7.4 ROSC Status Detection (ROSC)
        5. 7.3.7.5 Watchdog Enable (PG and WD_EN)
        6. 7.3.7.6 Watchdog Initialization
        7. 7.3.7.7 Window Watchdog Operation (WTS = Low)
        8. 7.3.7.8 Standard Watchdog Operation (WTS = High)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation With Input Voltage Lower Than 4 V
      2. 7.4.2 Operation With Input Voltage Higher Than 4 V
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input Capacitor
        2. 8.2.2.2 Output Capacitor
        3. 8.2.2.3 Power-Good Threshold
        4. 8.2.2.4 Power-Good Delay Period
        5. 8.2.2.5 Watchdog Setup
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  9. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.7.1 Window Watchdog (WTS, ROSC, FSEL and WRS)

These devices work in the window watchdog mode when the watchdog type selection (WTS) pin is connected to a to low voltage level. The user can set the duration of the watchdog window by connecting an external resistor (RROSC) to ground at the ROSC pin and setting the voltage level at the FSEL pin. The current through the RROSC resistor sets the clock frequency of the internal oscillator. The user can adjust the duration of the watchdog window (the watchdog timer period) by changing the resistor value. A high voltage level at the FSEL pin sets the watchdog window duration to 5 times as long as that of a low voltage level with same external component configuration.

The duration of the watchdog window and the duration of the fault output are multiples of the internal oscillator frequency, as shown by the following equations:

FSEL low
Equation 3. t(WD) = RROSC × 0.5 × 10-6
FSEL high
Equation 4. t(WD) = RROSC × 2.5 × 10-6
Watchdog initialization
Equation 5. t(WD_INI) = 8 × t(WD)
Open and closed windows
Equation 6. t(WD) = t(OW) + t(CW)
WRS low
Equation 7. t(OW) = t(CW) = 50% × t(WD)
WRS high
Equation 8. t(OW) = 8 × t(CW) = (8 / 9) × t(WD)

where:

  • t(WD) is the duration of the watchdog window
  • RROSC is the resistor connected at the ROSC pin
  • t(WD_INI) is the duration of the watchdog initialization
  • t(OW) is the duration of the open watchdog window
  • t(CW) is the duration of the closed watchdog window

For all the foregoing items, the unit of resistance is Ω and the unit of time is s.

Table 7-1 illustrates several periods of watchdog window with typical conditions.

Table 7-1 Several Typical Periods of Watchdog Window
FSEL R(ROSC) (kΩ) I(ROSC) (µA) t(WD) (ms) WATCHDOG PERIOD TOLERANCE
High 200 5 500 15%
100 10 250 10%
50 20 125
40 25 100
25 40 62.5
20 50 50
Low 100 10 50 10%
50 20 25
40 25 20
25 40 12.5
20 50 10

As illustrated in Figure 7-3, each watchdog window consists of an open window and a closed window. While the window ratio selection (WRS) pin is low, each open window (t(OW)) and closed window (t(CW)) has a width approximately 50% of the watchdog window (t(WD)). While the WRS pin is high, the ratio between open window and closed window is about 8:1. However, there is an exception to this; the first open window after watchdog initialization (t(WD_INI)) is eight times the duration of the watchdog window. The watchdog must receive the service signal (by software, external microcontroller, and so forth) during this initialization open window.

A watchdog fault occurs when servicing the watchdog during a closed window, or not servicing during an open window.

GUID-2874AEC4-91FB-4D7A-9934-15D4583A0968-low.gifFigure 7-3 Watchdog Initialization, Open Window and Closed Window