SLVSJH7 October   2025 TPS7E67-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
      1. 6.3.1 Enable (EN)
      2. 6.3.2 Dropout Voltage
      3. 6.3.3 Power-Good (PG)
      4. 6.3.4 Adjustable Power-Good Delay Timer (DELAY)
      5. 6.3.5 Undervoltage Lockout
      6. 6.3.6 Thermal Shutdown
      7. 6.3.7 Foldback Current Limit
      8. 6.3.8 Power Limit
      9. 6.3.9 Output Pulldown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Device Functional Mode Comparison
      2. 6.4.2 Normal Operation
      3. 6.4.3 Dropout Operation
      4. 6.4.4 Disabled
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Adjustable Device Feedback Resistor Selection
      2. 7.1.2 Recommended Capacitor Types
      3. 7.1.3 Input and Output Capacitor Selection
      4. 7.1.4 Reverse Current
      5. 7.1.5 Feed-Forward Capacitor
      6. 7.1.6 Dropout Voltage
      7. 7.1.7 Estimating Junction Temperature
      8. 7.1.8 Power Dissipation (PD)
      9. 7.1.9 Power Dissipation Versus Ambient Temperature
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Choose Feedback Resistors
      3. 7.2.3 Setting the Adjustable Power-Good Delay
      4. 7.2.4 Power Supply Recommendations
      5. 7.2.5 Layout
        1. 7.2.5.1 Layout Guidelines
        2. 7.2.5.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
      2. 8.1.2 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4 Pin Configuration and Functions

Figure 4-1 DRV Package (Fixed/ADJ),6-Pin WSON(Top View)
Figure 4-3 DGN Package (Fixed/ADJ),
8-Pin HVSSOP(Top View)
Figure 4-2 DRV Package, A-version (Fixed/ADJ),
6-Pin WSON(Top View)
Table 4-1 Pin Functions
PINTYPEDESCRIPTION
NAME
GND—Ground pin.
INInputInput supply pin. See the Section 5.3 table and the Section 7.1.3 section for more information.
OUTOutputOutput of the regulator. A capacitor is required from OUT to ground for stability. For best transient response, use the nominal recommended value or larger ceramic capacitor from OUT to ground; see the Section 5.3 table and the Section 7.1.3 section. Place the output capacitor as close to output of the device as possible.
ENInputEnable pin. Driving the enable pin high enables the device. Driving this pin low disables the device. High and low thresholds are listed in the Section 5.5 table. This pin has a weak internal pullup and can be left floating to enable the device or the pin can be connected to the input pin. Refer to Section 6.3.1 section.
ADJInputIn the adjustable configuration, this pin sets the output voltage with the help of a feedback divider.
PGOutputPower-good output, in open-drain topology. A pullup resistor is required on the PG pin. If the power-good functionality is not being used, ground this pin or leave floating. See the Section 6.3.3 section for more information.
DELAYInputPower-good delay adjustment pin. Connect a capacitor from this pin to GND to set the PG reset delay. Leave this pin floating for a default (t(DLY_FIX)) delay. See the Section 6.3.3 and Section 6.3.4 section for more information. If this functionality is not desired, leave this pin floating because connecting this pin to GND causes a permanent increase in the GND current.
NC—Not internally connected. Leave this pin open or connected to any potential. Tie this pin to ground for improved thermal performance.
Thermal padThermal pad. Connect the pad to GND for the best possible thermal performance. See the Section 7.2.5 section for more information.