SLVSFL2A May 2021 – August 2021 TPS7H4002-SP
The device uses a transconductance amplifier for the error amplifier and readily supports two of the commonly used frequency compensation circuits shown in Figure 7-8. In Type 2A, one additional high-frequency pole is added to attenuate high-frequency noise.
The following design guidelines are provided for advanced users who prefer to compensate using the general method. The step-by-step design procedure described in Detailed Design Procedure may also be used.
The general design guidelines for device loop compensation are as follows:
where gmea is the gm of the error amplifier (1400 μS), gmps is the gm of the power stage (12 S) and VREF is the reference voltage (0.807 V).