SNVSBL0A November   2020  – December 2021 TPS7H4010-SEP

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Characteristics
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Synchronous Step-Down Regulator
      2. 7.3.2  Auto Mode and FPWM Mode
      3. 7.3.3  Fixed-Frequency Peak Current-Mode Control
      4. 7.3.4  Adjustable Output Voltage
      5. 7.3.5  Enable and UVLO
      6. 7.3.6  Internal LDO, VCC_UVLO, and BIAS Input
      7. 7.3.7  Soft Start and Voltage Tracking
      8. 7.3.8  Adjustable Switching Frequency
      9. 7.3.9  Frequency Synchronization and Mode Setting
      10. 7.3.10 Internal Compensation and CFF
      11. 7.3.11 Bootstrap Capacitor and VBOOT-UVLO
      12. 7.3.12 Power-Good and Overvoltage Protection
      13. 7.3.13 Overcurrent and Short-Circuit Protection
      14. 7.3.14 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Standby Mode
      3. 7.4.3 Active Mode
        1. 7.4.3.1 CCM Mode
        2. 7.4.3.2 DCM Mode
        3. 7.4.3.3 PFM Mode
        4. 7.4.3.4 Fault Protection Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Output Voltage Setpoint
        2. 8.2.2.2  Switching Frequency
        3. 8.2.2.3  Input Capacitors
        4. 8.2.2.4  Inductor Selection
        5. 8.2.2.5  Output Capacitor Selection
        6. 8.2.2.6  Feed-Forward Capacitor
        7. 8.2.2.7  Bootstrap Capacitors
        8. 8.2.2.8  VCC Capacitor
        9. 8.2.2.9  BIAS
        10. 8.2.2.10 Soft Start
        11. 8.2.2.11 Undervoltage Lockout Setpoint
        12. 8.2.2.12 PGOOD
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Layout For EMI Reduction
      2. 10.1.2 Ground Plane
      3. 10.1.3 Optimize Thermal Performance
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RNP|30
  • KGD|0
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2 Typical Application

The TPS7H4010-SEP requires only a few external components to perform high-efficiency power conversion, as shown in Figure 8-1.

GUID-204F643D-0424-4CB3-8954-C273ABE8E21A-low.gifFigure 8-1 TPS7H4010-SEP Basic Schematic

The TPS7H4010-SEP also integrates many practical features to meet a wide range of system design requirements and optimization, such as UVLO, programmable soft-start time, start-up tracking, programmable switching frequency, clock synchronization and a power-good flag. Note that for ease of use, the feature pins do not require an additional component when not in use. They can be either left floating or shorted to ground. Please refer to Pin Configuration and Functions section for details.

A comprehensive schematic with all features utilized is shown in Figure 8-2.

GUID-930EF9B5-87BA-424C-BD8D-40438A066327-low.gifFigure 8-2 TPS7H4010-SEP Comprehensive Schematic With All Features Utilized

The external components must fulfill not only the needs of the power conversion, but also the stability criteria of the control loop. The TPS7H4010-SEP is optimized to work with a range of external components. For quick component selection, Table 8-1 can be used.

Table 8-1 Typical Component Selection
fSW (kHz) VOUT (V) L (µH) COUT (µF)(1) RFBT (kΩ) RFBB (kΩ) RT (kΩ)
35012.2500100OPEN115
50011.5400100OPEN78.7 or open
100010.68200100OPEN39.2
220010.47100100OPEN17.4
3503.34.720010043.5115
5003.33.315010043.578.7 or open
10003.31.88810043.539.2
22003.31.24410043.517.4
35056.812010025115
50054.7881002578.7 or open
100053.3661002539.2
220052.2441002517.4
3501215661009.1115
5001210441009.178.7 or open
1000126.8221009.139.2
3502422401004.3115
5002415301004.378.7 or open
(1) All the COUT values are after derating. Add more when using ceramics.