SLVSF07 July 2021 TPS7H5001-SP
The TPS7H5001-SP can be configured to support different DC-DC converter topologies by programming its maximum duty cycle using the DCL pin. For applications such as the buck converter where 100% duty cycle is needed, the DCL pin should be connected to VLDO. For other applications, such as active-clamp forward, the DCL could be connected to AVSS for 50% duty cycle limit or left floating for 75% maximum duty cycle. Note that OUTB and SRB are only active for the case when the duty cycle limit is set to 50% (DCL = AVSS). This configuration is intended to support applications such as the push-pull converter that require two primary switching outputs and two synchronous rectification outputs. If the controller is being operated in external synchronization mode, the most precise results are obtained when the applied system clock has a 50% duty cycle. Specifically, for the case when the duty cycle limit is set to 75% (DCL = floating), there may be some variation of the duty cycle limit that is dependent on the duty cycle of the external clock applied at SYNC.
|Maximum Duty Cycle (Nominal)||DCL Connection|