SLVSF07 July   2021

1. Features
2. Applications
3. Description
4. Revision History
5. Pin Configuration and Functions
6. Specifications
7. Detailed Description
1. 7.1 Overview
2. 7.2 Functional Block Diagram
3. 7.3 Feature Description
4. 7.4 Device Functional Modes
8. Application and Implementation
1. 8.1 Application Information
2. 8.2 Typical Application
1. 8.2.1 Design Requirements
2. 8.2.2 Detailed Design Procedure
3. 8.2.3 Application Curves
9. Power Supply Recommendations
10. 10Layout
11. 11Device and Documentation Support
12. 12Mechanical, Packaging, and Orderable Information

• HFT|22

### 7.3.18 Frequency Compensation

Since the TPS7H5001-SP uses a transconductance error amplifier (OTA), either Type 2A or Type 2B frequency compensation can be applied. The primary difference between the two compensation schemes is that Type 2A has an additional capacitor CHF in parallel with RCOMP and CCOMP in order to provide high-frequency noise attenuation. These components will be connected between the COMP pin of the controller, which is the OTA output, and AVSS. Figure 7-13 TPS7H5001-SP Frequency Compensation Options

For any of the topologies supported by the TPS7H5001-SP, the following procedure and equations can be used to select the compensation components. All parameters in the equations are in standard units unless otherwise indicated (that is, H for inductance, F for capacitance, Hz for frequency, and so on).

1. Select the desired crossover frequency (fc) for the converter.
2. Calculate RCOMP based on the selected crossover frequency fc.

1. Equation 19.

where:

• gmea is the error amplifier transconductance of 1800 × 10-6 A/V (typical)
• VREF is the 0.613 V reference voltage (typical)
• gmPS is the power stage transconductance (see Equation 23)

2. Calculate CCOMP to place compensation zero at the location of the power stage dominant pole.
Equation 20.
3. Determine the output capacitor ESR zero location (optional).
Equation 21.
4. Select the capacitor CHF to provide a high frequency pole to compensate for the ESR zero (optional).
Equation 22.

For different power converter topologies, the primary change to the compensation selection procedure will be the determination of the power stage transconductance gmPS. The power stage transconductance can be calculated as shown in Equation 23.

Equation 23.
where:
• NP is the number of primary turns on the main power transformer (set to 1 if no transformer is used)
• NS is the number of secondary turns on the main power transformer (set to 1 if no transformer is used)
• NCSP is the number of primary turns on the current sense transformer (set to 1 if no transformer is used)
• NCSS is the number of secondary turns of the current sense transformer (set to 1 if no transformer is used)
• RCS is the selected value of the current sense resistor
• CCSR is the ratio to COMP of CS_ILIM

Note that for the TPS7H5001-SP, the sensed current waveform is compared to the voltage at COMP divided down by the factor CCSR at the PWM comparator, which is accounted for in the denominator of the equation. For buck converters, all turns for the main power transformer can be set equal to 1 and the equation still applies.