SLVSF07E july   2021  – august 2023 TPS7H5001-SP , TPS7H5002-SP , TPS7H5003-SP , TPS7H5004-SP

PRODMIX  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Revision History
  6. Device Comparison Table
  7. Device Options
  8. Pin Configuration and Functions
  9. Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  Thermal Information
    5. 8.5  Electrical Characteristics: All Devices
    6. 8.6  Electrical Characteristics: TPS7H5001-SP
    7. 8.7  Electrical Characteristics: TPS7H5002-SP
    8. 8.8  Electrical Characteristics: TPS7H5003-SP
    9. 8.9  Electrical Characteristics: TPS7H5004-SP
    10. 8.10 Typical Characteristics
  10. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  VIN and VLDO
      2. 9.3.2  Start-Up
      3. 9.3.3  Enable and Undervoltage Lockout (UVLO)
      4. 9.3.4  Voltage Reference
      5. 9.3.5  Error Amplifier
      6. 9.3.6  Output Voltage Programming
      7. 9.3.7  Soft Start (SS)
      8. 9.3.8  Switching Frequency and External Synchronization
        1. 9.3.8.1 Internal Oscillator Mode
        2. 9.3.8.2 External Synchronization Mode
        3. 9.3.8.3 Primary-Secondary Mode
      9. 9.3.9  Primary Switching Outputs (OUTA/OUTB)
      10. 9.3.10 Synchronous Rectifier Outputs (SRA and SRB)
      11. 9.3.11 Dead Time and Leading Edge Blank Time Programmability (PS, SP, and LEB)
      12. 9.3.12 Pulse Skipping
      13. 9.3.13 Duty Cycle Programmability
      14. 9.3.14 Current Sense and PWM Generation (CS_ILIM)
      15. 9.3.15 Hiccup Mode Operation (HICC)
      16. 9.3.16 External Fault Protection (FAULT)
      17. 9.3.17 Slope Compensation (RSC)
      18. 9.3.18 Frequency Compensation
      19. 9.3.19 Thermal Shutdown
    4. 9.4 Device Functional Modes
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1  Switching Frequency
        2. 10.2.2.2  Output Voltage Programming Resistors
        3. 10.2.2.3  Dead Time
        4. 10.2.2.4  Leading Edge Blank Time
        5. 10.2.2.5  Soft-Start Capacitor
        6. 10.2.2.6  Transformer
        7. 10.2.2.7  Main Switching FETs
        8. 10.2.2.8  Synchronous Rectificier FETs
        9. 10.2.2.9  RCD Clamp
        10. 10.2.2.10 Output Inductor
        11. 10.2.2.11 Output Capacitance and Filter
        12. 10.2.2.12 Sense Resistor
        13. 10.2.2.13 Hiccup Capacitor
        14. 10.2.2.14 Frequency Compensation Components
        15. 10.2.2.15 Slope Compensation Resistor
      3. 10.2.3 Application Curves
    3. 10.3 Power Supply Recommendations
    4. 10.4 Layout
      1. 10.4.1 Layout Guidelines
      2. 10.4.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • HFT|22
  • KGD|0
  • PW|24
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Description

The TPS7H500x-SP family of high speed radiation-hardness-assured PWM controllers. The controllers provide a number of features that are beneficial for the design of DC-DC converter topologies intended for space applications. The controllers have a 0.613-V +0.7%/–1% accurate internal reference and configurable switching frequency up to 2 MHz. Each device offers programmable slope compensation and soft-start.

The TPS7H500x-SP series can be driven using an external clock through the SYNC pin or by using the internal oscillator at a frequency programmed by the user. The controller family offers the user various options for switching outputs, synchronous rectification capability, dead time (fixed or configurable), leading edge blank time (fixed or configurable), and duty cycle limit. Each device in the TPS7H500x-SP series has a 22-pin CFP package. The TPS7H5001-SP is also available in a 24-pin TSSOP plastic package.

Device Information
PART NUMBER(1) GRADE BODY SIZE
5962R1822201VXC QMLV-RHA 22-pin ceramic
6.21 mm × 7.69 mm
Mass = 415.6 mg(2)
5962R1822202VXC
5962R1822203VXC
5962R1822204VXC
TPS7H5001HFT/EM Engineering samples
TPS7H5002HFT/EM
TPS7H5003HFT/EM
TPS7H5004HFT/EM
5962R1822201PYE QMLP-RHA 24-pin plastic
4.40 mm × 7.80 mm
Mass = 102.3 mg(2)
5962R1822201V9A QMLV-RHA KGD Die
5962R1822202V9A
5962R1822203V9A
5962R1822204V9A
TPS7H5001Y/EM Engineering samples
TPS7H5002Y/EM
TPS7H5003Y/EM
TPS7H5004Y/EM
For additional information, view the Device Options table.
Mass is accurate to ±10%.