SLVSF07 July 2021 TPS7H5001-SP
When utilizing peak current mode control in switching power converter design, the converter can enter into an unstable state when the duty cycle for the main power switch rises above 50 percent. Essentially, the converter will be in a state where the error between the peak current and average current increases with each subsequent switching cycle. This instability, known as subharmonic oscillation, can be mitigated by adding slope compensation. For the TPS7H5001-SP, the slope compensation is in the form of a voltage ramp that is subtracted from the error amplifier output divided down by the parameter CCSR (COMP to CS_LIM ratio). The minimum slope compensation for stability over the entire duty cycle range is equal to 0.5 × m, where m is the inductor falling current slope. The recommended slope compensation is 1 × m, as any increase above this value will not improve stability.
For a typical buck converter, setting the slope compensation equal to the downward slope of the sensed current waveform yields the calculation in Equation 16 .
If no current sense transformer is used, set NCSP/NCSS to 1.
The slope compensation for the forward converter will be similar with the note that the sensed current waveform would also need to take into account the turns ratio of the main power transformer.
For the TPS7H5001-SP, a resistor from the RSC pin to AVSS can be used to set the desired slope compensation of the controller. Equation 18 shows the calculation for determining the proper resistor value for RSC.