Refer to the PDF data sheet for device specific package drawings
The device has a power good (PG) output. The PG pin goes high impedance once the output is above 95% of the nominal voltage, and is driven low once the output voltage falls below typically 90% of the nominal voltage. The PG pin is an open drain output and is specified to sink up to 1 mA. The power good output requires a pull-up resistor connecting to any voltage rail less than 6 V.
The PG signal can be used for sequencing of multiple rails by connecting it to the EN pin of other converters. Leave the PG pin floating when it is not used. Table 1 shows the PG pin logic.
|DEVICE CONDITIONS||LOGIC STATUS|
|Enable||EN = High, VFB ≥ VPG||√|
|EN = High, VFB < VPG||√|
|Shutdown||EN = Low||√|
|Thermal Shutdown||TJ > TJSD||√|
|UVLO||0.5 V < VIN < VUVLO||√|
|Power Supply Removal||VIN ≤ 0.5 V||√|