SLVSCN4D October   2014  – June 2019 TPS82084 , TPS82085

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1. 1.8 V Output Application
      2. 1.8 V Output Efficiency
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommend Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power Save Mode (PSM)
      2. 7.3.2 Low Dropout Operation (100% Duty Cycle)
      3. 7.3.3 Soft Startup
      4. 7.3.4 Switch Current Limit and Short Circuit Protection (Hiccup-Mode)
      5. 7.3.5 Undervoltage Lockout
      6. 7.3.6 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Enable and Disable
      2. 7.4.2 Power Good Output
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 1.2-V Output Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Setting the Output Voltage
          2. 8.2.1.2.2 Input and Output Capacitor Selection
        3. 8.2.1.3 Application Performance Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Consideration
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Related Links
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Tape and Reel Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • SIL|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

TJ = -40°C to 125°C and VIN = 2.5V to 6V. Typical values are at TJ = 25°C and VIN = 3.6V, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY
VIN Input voltage range 2.5 6 V
IQ Quiescent current into VIN No load, device not switching
TJ = -40°C to 85°C, VIN = 2.5 V to 5.5 V		 17 25 µA
ISD Shutdown current into VIN EN = Low,
TJ = -40°C to 85°C, VIN = 2.5 V to 5.5 V		 0.7 5 µA
VUVLO Under voltage lock out threshold VIN falling 2.1 2.2 2.3 V
VIN rising 2.3 2.4 2.5 V
TJSD Thermal shutdown threshold TJ rising 150 °C
Thermal shutdown hysteresis TJ falling 20 °C
LOGIC INTERFACE EN
VIH High-level input voltage 1.0 V
VIL Low-level input voltage 0.4 V
Ilkg(EN) Input leakage current into EN pin EN = High 0.01 0.16 µA
RPD Pull-down resistance at EN pin EN = Low 400 kΩ
SOFT START, POWER GOOD
tSS Soft start time Time from EN high to 95% of VOUT nominal 0.8 ms
VPG Power good threshold VOUT rising, referenced to VOUT nominal 93% 95% 98%
VOUT falling, referenced to VOUT nominal 88% 90% 93%
VPG,OL Low-level output voltage Isink = 1mA 0.4 V
Ilkg(PG) Input leakage current into PG pin VPG = 5V 0.01 0.16 µA
OUTPUT
VOUT Output voltage range 0.8 VIN V
VFB Feedback regulation voltage PWM mode 792 800 808 mV
PSM mode, COUT = 22 µF 792 800 817
Ilkg(FB) Feedback input leakage current VFB = 0.8 V 0.01 0.1 µA
RDIS Output discharge resistor EN = Low, VOUT = 1.8 V 260 Ω
Line regulation IOUT = 1 A, VIN = 2.5 V to 6 V 0.02 %/V
Load regulation IOUT = 0.5 A to 3 A 0.16 %/A
POWER SWITCH
RDS(on) High-side FET on-resistance ISW = 500 mA 31 56 mΩ
Low-side FET on-resistance ISW = 500 mA 23 45 mΩ
RDP Dropout resistance 100% mode 69 mΩ
ILIMF High-side FET switch current limit TPS82085 3.7 4.6 5.5 A
TPS82084 3.6
fSW PWM switching frequency IOUT = 1 A 2.4 MHz