SNVSBY7 March   2021 TPS92390

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Logic Interface Characteristics
    7. 6.7 Timing Requirements for I2C Interface
    8.    
    9. 6.8 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Control Interface
      2. 7.3.2 Function Setting
      3. 7.3.3 Device Supply (VDD)
      4. 7.3.4 Enable (EN)
      5. 7.3.5 Charge Pump
      6. 7.3.6 Boost Controller
        1. 7.3.6.1 Boost Cycle-by-Cycle Current Limit
        2. 7.3.6.2 Controller Min On/Off Time
        3. 7.3.6.3 Boost Adaptive Voltage Control
          1. 7.3.6.3.1 FB Divider Using Two-Resistor Method
          2. 7.3.6.3.2 FB Divider Using Three-Resistor Method
          3. 7.3.6.3.3 FB Divider Using External Compensation
        4. 7.3.6.4 Boost Sync and Spread Spectrum
        5. 7.3.6.5 Light Load Mode
      7. 7.3.7 LED Current Sinks
        1. 7.3.7.1 LED Output Current Setting
        2. 7.3.7.2 LED Output String Configuration
        3. 7.3.7.3 LED Output PWM Clock Generation
      8. 7.3.8 Brightness Control
        1. 7.3.8.1 Brightness Control Signal Path
        2. 7.3.8.2 Dimming Mode
        3. 7.3.8.3 LED Dimming Frequency
        4. 7.3.8.4 Phase-Shift PWM Mode
        5. 7.3.8.5 Hybrid Mode
        6. 7.3.8.6 Direct PWM Mode
        7. 7.3.8.7 Sloper
        8. 7.3.8.8 PWM Detector Hysteresis
        9. 7.3.8.9 Dither
      9. 7.3.9 Protection and Fault Detections
        1. 7.3.9.1 Supply Faults
          1. 7.3.9.1.1 VIN Undervoltage Faults (VINUVLO)
          2.       
          3. 7.3.9.1.2 VIN Overvoltage Faults (VINOVP)
          4. 7.3.9.1.3 VDD Undervoltage Faults (VDDUVLO)
          5. 7.3.9.1.4 VIN OCP Faults (VINOCP)
            1. 7.3.9.1.4.1 VIN OCP Current Limit vs. Boost Cycle-by-Cycle Current Limit
          6. 7.3.9.1.5 Charge Pump Faults (CPCAP, CP)
          7. 7.3.9.1.6 CRC Error Faults (CRCERR)
        2. 7.3.9.2 Boost Faults
          1. 7.3.9.2.1 Boost Overvoltage Faults (BSTOVPL, BSTOVPH)
          2. 7.3.9.2.2 Boost Overcurrent Faults (BSTOCP)
          3. 7.3.9.2.3 LEDSET Resistor Missing Faults (LEDSET)
          4. 7.3.9.2.4 MODE Resistor Missing Faults (MODESEL)
          5. 7.3.9.2.5 FSET Resistor Missing Faults (FSET)
          6. 7.3.9.2.6 ISET Resistor Out of Range Faults (ISET)
          7. 7.3.9.2.7 Thermal Shutdown Faults (TSD)
        3. 7.3.9.3 LED Faults
          1. 7.3.9.3.1 Open LED Faults (OPEN_LED)
          2. 7.3.9.3.2 Short LED Faults (SHORT_LED)
          3. 7.3.9.3.3 LED Short to GND Faults (GND_LED)
          4. 7.3.9.3.4 Invalid LED String Faults (INVSTRING)
          5. 7.3.9.3.5 I2C Timeout Faults
        4. 7.3.9.4 Overview of the Fault and Protection Schemes
    4. 7.4 Device Functional Modes
      1. 7.4.1  State Diagram
      2. 7.4.2  Shutdown
      3. 7.4.3  Device Initialization
      4. 7.4.4  Standby Mode
      5. 7.4.5  Power-line FET Soft Start
      6. 7.4.6  Boost Start-Up
      7. 7.4.7  Normal Mode
      8. 7.4.8  Fault Recovery
      9. 7.4.9  Latch Fault
      10. 7.4.10 Start-Up Sequence
    5. 7.5 Programming
      1. 7.5.1 I2C-Compatible Interface
      2. 7.5.2 Programming Examples
        1. 7.5.2.1 General Configuration Registers
        2. 7.5.2.2 Clearing Fault Interrupts
        3. 7.5.2.3 Disabling Fault Interrupts
        4. 7.5.2.4 Diagnostic Registers
    6. 7.6 Register Maps
      1. 7.6.1 FullMap Registers
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Full Feature Application for Display Backlight
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1  Inductor Selection
          2. 8.2.1.2.2  Output Capacitor Selection
          3. 8.2.1.2.3  Input Capacitor Selection
          4. 8.2.1.2.4  Charge Pump Output Capacitor
          5. 8.2.1.2.5  Charge Pump Flying Capacitor
          6. 8.2.1.2.6  Output Diode
          7. 8.2.1.2.7  Switching FET
          8. 8.2.1.2.8  Boost Sense Resistor
          9. 8.2.1.2.9  Power-Line FET
          10. 8.2.1.2.10 Input Current Sense Resistor
          11. 8.2.1.2.11 Feedback Resistor Divider
          12. 8.2.1.2.12 Critical Components for Design
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Application With Basic/Minimal Operation
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
      3. 8.2.3 SEPIC Mode Application
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
          1. 8.2.3.2.1  Inductor Selection
          2. 8.2.3.2.2  Coupling Capacitor Selection
          3. 8.2.3.2.3  Output Capacitor Selection
          4. 8.2.3.2.4  Input Capacitor Selection
          5. 8.2.3.2.5  Charge Pump Output Capacitor
          6. 8.2.3.2.6  Charge Pump Flying Capacitor
          7. 8.2.3.2.7  Switching FET
          8. 8.2.3.2.8  Output Diode
          9. 8.2.3.2.9  Switching Sense Resistor
          10. 8.2.3.2.10 Power-Line FET
          11. 8.2.3.2.11 Input Current Sense Resistor
          12. 8.2.3.2.12 Feedback Resistor Divider
          13. 8.2.3.2.13 Critical Components for Design
        3. 8.2.3.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

FullMap Registers

Table 7-12 lists the memory-mapped registers for the FullMap registers. All register offset addresses not listed in Table 7-12 should be considered as reserved locations and the register contents should not be modified.

Table 7-12 FULLMAP Registers
OffsetAcronymRegister NameSection
00hBRT_CONTROLDisplay BrightnessGo
02hLED_CURR_CONFIGLED CurrentGo
04hUSER_CONFIG1User Config 1Go
06hUSER_CONFIG2User Config 2Go
08hSUPPLY_INT_ENSupply Interrupt EnableGo
0AhBOOST_INT_ENBoost Interrupt EnableGo
0ChLED_INT_ENLED Interrupt EnableGo
0EhSUPPLY_STATUSSupply Fault StatusGo
10hBOOST_STATUSBoost Fault StatusGo
12hLED_STATUSLED Fault StatusGo
14hFSM_DIAGNOSTICSDevice State DiagnosticsGo
16hPWM_INPUT_DIAGNOSTICSPWM Input DiagnosticsGo
18hPWM_OUTPUT_DIAGNOSTICSPWM Output DiagnosticsGo
1AhLED_CURR_DIAGNOSTICSLED Current DiagnosticsGo
1ChADAPT_BOOST_DIAGNOSTICSAdaptive Boost DiagnosticsGo
1EhAUTO_DETECT_DIAGNOSTICSAuto Detect DiagnosticsGo

Complex bit access types are encoded to fit into small table cells. Table 7-13 shows the codes that are used for access types in this section.

Table 7-13 FullMap Access Type Codes
Access TypeCodeDescription
Read Type
RRRead
Write Type
WWWrite
Reset or Default Value
nValue after reset or the default value

7.6.1.1 BRT_CONTROL Register (Offset = 00h) [reset = 0h]

BRT_CONTROL is shown in Figure 7-23 and described in Table 7-14.

Return to Summary Table.

Figure 7-23 BRT_CONTROL Register
1514131211109876543210
DISPLAY_BRT
R/W-0h
Table 7-14 BRT_CONTROL Register Field Descriptions
BitFieldTypeResetDescription
15-0DISPLAY_BRTR/W0hDisplay Brightness Register

7.6.1.2 LED_CURR_CONFIG Register (Offset = 02h) [reset = 0FFFh]

LED_CURR_CONFIG is shown in Figure 7-24 and described in Table 7-15.

Return to Summary Table.

Figure 7-24 LED_CURR_CONFIG Register
1514131211109876543210
RESERVEDLED_CURRENT
R/W-0hR/W-FFFh
Table 7-15 LED_CURR_CONFIG Register Field Descriptions
BitFieldTypeResetDescription
15-12RESERVEDR/W0hThese bits are reserved.
11-0LED_CURRENTR/WFFFhLED current control for all LED outputs

7.6.1.3 USER_CONFIG1 Register (Offset = 04h) [reset = 8A3h]

USER_CONFIG1 is shown in Figure 7-25 and described in Table 7-16.

Return to Summary Table.

Figure 7-25 GROUPING1 Register
15141312111098
RESERVED

SPREAD_PSEUDO_EN

SPREAD_MOD_FREQ

SPREAD_RANGE

BRT_MODE
R/W-0hR/W-0hR/W-0hR/W-2hR/W-0h
76543210
SLOPE_SELECTDITHER_SELECTADV_SLOPE_ENABLE

RESERVED

R/W-5hR/W-0hR/W-1hR/W-1h
Table 7-16 USER_CONFIG1 Register Field Descriptions
BitFieldTypeResetDescription

15

RESERVEDR/W0hThis bit is reserved.
14SPREAD_PSEUDO_ENR/W0h

0h = Pseudo Random SS disabled

1h = Pseudo Random SS enabled

13-12SPREAD_MOD_FREQR/W0h

Boost spread spectrum modulation frequency

0h = 200 Hz

1h = 500 Hz

2h = 800 Hz

3h = 1.2 kHz

11-10SPREAD_RANGER/W2h

OSC_BST spread spectrum range

0h = 3.3%

1h = 4.3%

2h = 5.3%

3h = 7.2%

9-8BRT_MODER/W0h

Select PWM pin or DISPLAY_BRT register for brightness controll

0h = Brightness controlled by PWM input

1h = Reserved

2h = Brightness controlled by DISPLAY_BRT register

3h = Reserved

7-5SLOPE_SELECTR/W5h

Select duration for linear brightness sloper

0h = Disabled

1h = 1 ms

2h = 2 ms

3h = 50 ms

4h = 100 ms

5h = 200 ms

6h = 300 ms

7h = 500 ms

Times are for linear slope mode. Advanced sloper will increase durations while adding additional smoothing to brightness transitions. 1 ms and 2 ms sloper times are intended to be used only in linear mode. 50 ms to 500 ms sloper durations may be used with or without advanced sloper function.

4-2DITHER_SELECTR/W0h

Dither mode select

0h = Dither Disabled

1h = 1-bit Dither

2h = 2-bit Dither

3h = 3-bit Dither

4h = 4-bit Dither

1ADV_SLOPE_ENABLER/W1h

0h = Linear Sloping

1h = Advanced Sloping

0

RESERVED

R/W1h

This bit is reserved.

7.6.1.4 USER_CONFIG2 Register (Offset = 06h) [reset = 100h]

USER_CONFIG2 is shown in Figure 7-26 and described in Table 7-17.

Return to Summary Table.

Figure 7-26 USER_CONFIG2 Register
15141312111098
RESERVEDEN_LED_GND_DETECT
R/W-0hR/W-1h
76543210
RESERVEDRESERVEDRESERVEDLED4_SHORT_DISABLELED3_SHORT_DISABLELED2_SHORT_DISABLELED1_SHORT_DISABLE
R/W-0hR/W-0hR/W-0hR/W-0hR/W-0hR/W-0hR/W-0h
Table 7-17 USER_CONFIG2 Register Field Descriptions
BitFieldTypeResetDescription
15-9RESERVEDR/W0h

These bits are reserved.

8EN_LED_GND_DETECTR/W1h

Enable LED short to ground detection during Boost_SS and normal stage

0h = Disable

1h = Enable

7-6RESERVED R/W0h

These bits must write 0 for normal operation.

5RESERVEDR/W0h

This bit must write 0 for normal operation.

4RESERVEDR/W0h

This bit must write 0 for normal operation.

3LED4_SHORT_DISABLER/W0h

Disable LED string4 internal short fault.

0h = Enable

1h = Disable

2LED3_SHORT_DISABLER/W0h

Disable LED string3 internal short fault.

0h = Enable

1h = Disable

1LED2_SHORT_DISABLER/W0h

Disable LED string2 internal short fault.

0h = Enable

1h = Disable

0LED1_SHORT_DISABLER/W0h

Disable LED string1 internal short fault.

0h = Enable

1h = Disable

7.6.1.5 SUPPLY_INT_EN Register (Offset = 08h) [reset = 2AAAh]

SUPPLY_INT_EN is shown in Figure 7-27 and described in Table 7-18.

Return to Summary Table.

Figure 7-27 SUPPLY_INT_EN Register
15141312111098
RESERVED

BSTSYNC_INT_EN

CP_INT_ENCPCAP_INT_EN
R/W-0hR/W-2hR/W-2hR/W-2h
76543210
VINOCP_INT_ENVDDUVLO_INT_ENVINOVP_INT_ENVINUVLO_INT_EN
R/W-2hR/W-2hR/W-2hR/W-2h
Table 7-18 SUPPLY_INT_EN Register Field Descriptions
BitFieldTypeResetDescription

15-14

RESERVEDR/W0h

These bits are reserved.

13-12BSTSYNC_INT_ENR/W2h

Missing boost sync interrupt enable

Read:

0h = Interrupt is currently disabled

2h = Interrupt is currently enabled

Write:

1h = Disable interrupt

3h = Enable interrupt

11-10CP_INT_ENR/W2h

Charge pump interrupt enable

Read:

0h = Interrupt is currently disabled

2h = Interrupt is currently enabled

Write:

1h = Disable interrupt

3h = Enable interrupt

9-8CPCAP_INT_ENR/W2h

Charge pump cap missing interrupt enable

Read:

0h = Interrupt is currently disabled

2h = Interrupt is currently enabled

Write:

1h = Disable interrupt

3h = Enable interrupt

7-6VINOCP_INT_ENR/W2h

VIN over-current interrupt enable

Read:

0h = Interrupt is currently disabled

2h = Interrupt is currently enabled

Write:

1h = Disable interrupt

3h = Enable interrupt

5-4VDDUVLO_INT_ENR/W2h

VDD under-voltage interrupt enable

Read:

0h = Interrupt is currently disabled

2h = Interrupt is currently enabled

Write:

1h = Disable interrupt

3h = Enable interrupt

3-2VINOVP_INT_ENR/W2h

VIN over-voltage interrupt enable

Read:

0h = Interrupt is currently disabled

2h = Interrupt is currently enabled

Write:

1h = Disable interrupt

3h = Enable interrupt

1-0VINUVLO_INT_ENR/W2h

VIN under-voltage interrupt enable

Read:

0h = Interrupt is currently disabled

2h = Interrupt is currently enabled

Write:

1h = Disable interrupt

3h = Enable interrupt

7.6.1.6 BOOST_INT_EN Register (Offset = 0Ah) [reset = A028h]

BOOST_INT_EN is shown in Figure 7-28 and described in Table 7-19.

Return to Summary Table.

Figure 7-28 BOOST_INT_EN Register
15141312111098
TSD_INT_ENISET_INT_ENLEDSET_INT_ENMODE_INT_EN
R/W-2hR/W-2hR/W-2hR/W-2h
76543210
FSET_INT_ENBSTOCP_INT_ENBSTOVPH_INT_ENReserved
R/W-2hR/W-2hR/W-2hR/W-0h
Table 7-19 BOOST_INT_EN Register Field Descriptions
BitFieldTypeResetDescription
15-14TSD_INT_ENR/W2h

Thermal shutdown interrupt enable

Read:

0h = Interrupt is currently disabled

2h = Interrupt is currently enabled

Write:

1h = Disable interrupt

3h = Enable interrupt

13-12ISET_INT_ENR/W2h

ISET resistor short to ground interrupt enable

Read:

0h = Interrupt is currently disabled

2h = Interrupt is currently enabled

Write:

1h = Disable interrupt

3h = Enable interrupt

11-10LEDSET_INT_ENR/W0h

Missing LEDSET resistor interrupt enable

Read:

0h = Interrupt is currently disabled

2h = Interrupt is currently enabled

Write:

1h = Disable interrupt

3h = Enable interrupt

9-8MODE_INT_ENR/W0h

Missing MODE resistor interrupt enable

Read:

0h = Interrupt is currently disabled

2h = Interrupt is currently enabled

Write:

1h = Disable interrupt

3h = Enable interrupt

7-6FSET_INT_ENR/W0h

Missing FSET resistor interrupt enable

Read:

0h = Interrupt is currently disabled

2h = Interrupt is currently enabled

Write:

1h = Disable interrupt

3h = Enable interrupt

5-4BSTOCP_INT_ENR/W2h

Boost over-current interrupt enable

Read:

0h = Interrupt is currently disabled

2h = Interrupt is currently enabled

Write:

1h = Disable interrupt

3h = Enable interrupt

3-2BSTOVPH_INT_ENR/W2h

Boost over-voltage high interrupt enable

Read:

0h = Interrupt is currently disabled

2h = Interrupt is currently enabled

Write:

1h = Disable interrupt

3h = Enable interrupt

1-0ReservedR/W0h

These bits are reserved.

7.6.1.7 LED_INT_EN Register (Offset = 0Ch) [reset = AAh]

LED_INT_EN is shown in Figure 7-29 and described in Table 7-20.

Return to Summary Table.

Figure 7-29 LED_INT_EN Register
15141312111098
RESERVED
R/W-0h
76543210
GLOBAL_INT_ENI2C_ERROR_INT_ENINVSTRING_INT_ENVINUVP_INT_EN
R/W-2hR/W-2hR/W-2hR/W-2h
Table 7-20 LED_INT_EN Register Field Descriptions
BitFieldTypeResetDescription
15-8RESERVEDR/W0h

These bits are reserved.

7-6GLOBAL_INT_ENR/W2h

Global interrupt enable

Read:

0h = Interrupt is currently disabled

2h = Interrupt is currently enabled

Write:

1h = Disable interrupt

3h = Enable interrupt

5-4I2C_ERROR_INT_ENR/W2h

I2C time out interrupt enable

Read:

0h = Interrupt is currently disabled

2h = Interrupt is currently enabled

Write:

1h = Disable interrupt

3h = Enable interrupt

3-2INVSTRING_INT_ENR/W2h

Invalid LED string configuration interrupt enable

Read:

0h = Interrupt is currently disabled

2h = Interrupt is currently enabled

Write:

1h = Disable interrupt

3h = Enable interrupt

1-0LED_INT_ENR/W2h

LED open/internal short/short to GND interrupt enable

Read:

0h = Interrupt is currently disabled

2h = Interrupt is currently enabled

Write:

1h = Disable interrupt

3h = Enable interrupt

7.6.1.8 SUPPLY_STATUS Register (Offset = 0Eh) [reset = 0h]

SUPPLY_STATUS is shown in Figure 7-30 and described in Table 7-21.

Return to Summary Table.

Figure 7-30 SUPPLY_STATUS Register
15141312111098

CRCERR_STATUS

CRCERR_CLEAR

BSTSYNC_STATUS

BSTSYNC_CLEAR

CP_STATUSCP_CLEARCPCAP_STATUSCPCAP_CLEAR
R/W-0hR/W-0hR/W-0hR/W-0hR/W-0hR/W-0hR/W-0hR/W-0h
76543210
VINOCP_STATUSVINOCP_CLEARVDDUVLO_STATUSVDDUVLO_CLEARVINOVP_STATUSVINOVP_CLEARVINUVLO_STATUSVINUVLO_CLEAR
R/W-0hR/W-0hR/W-0hR/W-0hR/W-0hR/W-0hR/W-0hR/W-0h
Table 7-21 SUPPLY_STATUS Register Field Descriptions
BitFieldTypeResetDescription
15CRCERR_STATUSR/W0h

CRC error fault status

0h = No fault

1h = Fault

14CRCERR_CLEARR/W0h

CRC error fault clear

Write "1" to both Status bit and Clear bit at the same time to clear interrupt register status and interrupt pin status

13BSTSYNC_STATUSR/W0h

Missing boost sync fault status

0h = No fault

1h = Fault

12BSTSYNC_CLEARR/W0h

Missing boost sync fault clear

Write "1" to both Status bit and Clear bit at the same time to clear interrupt register status and interrupt pin status

11CP_STATUSR/W0h

Charge pump fault status

0h = No fault

1h = Fault

10CP_CLEARR/W0h

Charge pump fault clear

Write "1" to both Status bit and Clear bit at the same time to clear interrupt register status and interrupt pin status

9CPCAP_STATUSR/W0h

Missing charge pump fault status

0h = No fault

1h = Fault

8CPCAP_CLEARR/W0h

Missing charge pump fault clear

Write "1" to both Status bit and Clear bit at the same time to clear interrupt register status and interrupt pin status

7VINOCP_STATUSR/W0h

VIN over-current fault status

0h = No fault

1h = Fault

6VINOCP_CLEARR/W0h

VIN over-current fault clear

Write "1" to both Status bit and Clear bit at the same time to clear interrupt register status and interrupt pin status

5VDDUVLO_STATUSR/W0h

VDD under-voltage fault status

0h = No fault

1h = Fault

4VDDUVLO_CLEARR/W0h

VDD under-voltage fault clear

Write "1" to both Status bit and Clear bit at the same time to clear interrupt register status and interrupt pin status

3VINOVP_STATUSR/W0h

VIN over-voltage fault status

0h = No fault

1h = Fault

2VINOVP_CLEARR/W0h

VIN over-voltage fault clear

Write "1" to both Status bit and Clear bit at the same time to clear interrupt register status and interrupt pin status

1VINUVLO_STATUSR/W0h

VIN under-voltage fault status

0h = No fault

1h = Fault

0VINUVLO_CLEARR/W0h

VIN under-voltage fault clear

Write "1" to both Status bit and Clear bit at the same time to clear interrupt register status and interrupt pin status

7.6.1.9 BOOST_STATUS Register (Offset = 10h) [reset = 0h]

BOOST_STATUS is shown in Figure 7-31 and described in Table 7-22.

Return to Summary Table.

Figure 7-31 BOOST_STATUS Register
15141312111098
TSD_STATUSTSD_CLEARISET_STATUSISET_CLEARLEDSET_STATUSLEDSET_CLEARMODESEL_STATUSMODESEL_CLEAR
R/W-0hR/W-0hR/W-0hR/W-0hR/W-0hR/W-0hR/W-0hR/W-0h
76543210
FSET_STATUSFSET_CLEARBSTOCP_STATUSBSTOCP_CLEARBSTOVPH_STATUSBSTOVPH_CLEARBSTOVPL_STATUSBSTOVPL_CLEAR
R/W-0hR/W-0hR/W-0hR/W-0hR/W-0hR/W-0hR/W-0hR/W-0h
Table 7-22 BOOST_STATUS Register Field Descriptions
BitFieldTypeResetDescription
15TSD_STATUSR/W0h

Thermal shutdown fault status

0h = No fault

1h = Fault

14TSD_CLEARR/W0h

Thermal shutdown fault clear

Write "1" to both Status bit and Clear bit at the same time to clear interrupt register status and interrupt pin status

13ISET_STATUSR/W0h

ISET resistor short to ground fault status

0h = No fault

1h = Fault

12ISET_CLEARR/W0h

ISET resistor short to ground fault clear

Write "1" to both Status bit and Clear bit at the same time to clear interrupt register status and interrupt pin status

11LEDSET_STATUSR/W0h

Missing LED resistor fault status

0h = No fault

1h = Fault

10LEDSET_CLEARR/W0h

Missing LED resistor fault clear

Write "1" to both Status bit and Clear bit at the same time to clear interrupt register status and interrupt pin status

9MODESEL_STATUSR/W0h

Missing MODE SEL resistor fault status

0h = No fault

1h = Fault

8MODESEL_CLEARR/W0h

Missing MODE SEL resistor fault clear

Write "1" to both Status bit and Clear bit at the same time to clear interrupt register status and interrupt pin status

7FSET_STATUSR/W0h

Missing boost FSET resistor fault status

0h = No fault

1h = Fault

6FSET_CLEARR/W0h

Missing boost FSET resistor fault clear

Write "1" to both Status bit and Clear bit at the same time to clear interrupt register status and interrupt pin status

5BSTOCP_STATUSR/W0h

Boost over-current fault status

0h = No fault

1h = Fault

4BSTOCP_CLEARR/W0h

Boost over-current fault clear

Write "1" to both Status bit and Clear bit at the same time to clear interrupt register status and interrupt pin status

3BSTOVPH_STATUSR/W0h

Boost OVP high fault status

0h = No fault

1h = Fault

2BSTOVPH_CLEARR/W0h

Boost OVP high fault clear

Write "1" to both Status bit and Clear bit at the same time to clear interrupt register status and interrupt pin status

1BSTOVPL_STATUSR/W0h

Boost OVP low fault status

0h = No fault

1h = Fault

0BSTOVPL_CLEARR/W0h

Boost OVP low fault clear

Write "1" to both Status bit and Clear bit at the same time to clear interrupt register status

7.6.1.10 LED_STATUS Register (Offset = 12h) [reset = 0h]

LED_STATUS is shown in Figure 7-32 and described in Table 7-23.

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Figure 7-32 LED_STATUS Register
15141312111098
RESERVEDI2C_ERROR_STATUSI2C_ERROR_CLEARINVSTRING_STATUSINVSTRING_CLEARLED_STATUSLED_CLEARGND_LED
R/W-0hR/W-0hR/W-0hR/W-0hR/W-0hR/W-0hR/W-0hR-0h
76543210
SHORT_LEDOPEN_LEDRESERVEDRESERVEDLED4_FAULTLED3_FAULTLED2_FAULTLED1_FAULT
R-0hR-0hR-0hR-0hR-0hR-0hR-0hR-0h
Table 7-23 LED_STATUS Register Field Descriptions
BitFieldTypeResetDescription
15RESERVEDR/W0hThis bit is reserved
14I2C_ERROR_STATUSR/W0h

I2C time out fault status

0h = No fault

1h = Fault

13I2C_ERROR_CLEARR/W0h

I2C time out fault clear

Write "1" to both Status bit and Clear bit at the same time to clear interrupt register status and interrupt pin status

12INVSTRING_STATUSR/W0h

Invalid string configuration fault status

0h = No fault

1h = Fault

11INVSTRING_CLEARR/W0h

Invalid string configuration fault clear

Write "1" to both Status bit and Clear bit at the same time to clear interrupt register status and interrupt pin status

10LED_STATUSR/W0h

LED open/internal short/short to GND fault status

0h = No fault

1h = Fault

9LED_CLEARR/W0h

LED open/internal short/short to GND fault clear

Write "1" to both Status bit and Clear bit at the same time to clear interrupt register status and interrupt pin status

8GND_LEDR0h

LED short to GND fault status

0h = No fault

1h = Fault

7SHORT_LEDR0h

LED internal short Status

0h = No Fault

1h = Fault

Status is cleared with LED_STATUS bit

6OPEN_LEDR0h

LED open fault status

0h = No fault

1h = Fault

Status is cleared with LED_STATUS bit

5RESERVEDR0h

This bit must write 0 for normal operation.

4RESERVEDR0h

This bit must write 0 for normal operation.

3LED4_FAULTR0h

LED 4 Status

0h = No Fault

1h = Fault

2LED3_FAULTR0h

LED 3 Status

0h = No Fault

1h = Fault

1LED2_FAULTR0h

LED 2 Status

0h = No Fault

1h = Fault

0LED1_FAULTR0h

LED 1 Status

0h = No Fault

1h = Fault

7.6.1.11 FSM_DIAGNOSTICS Register (Offset = 14h) [reset = 0h]

FSM_DIAGNOSTICS is shown in Figure 7-33 and described in Table 7-24.

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Figure 7-33 FSM_DIAGNOSTICS Register
15141312111098
RESERVED
R-0h
76543210
RESERVEDFSM_LIVE_STATUS
R-0hR-0h
Table 7-24 FSM_DIAGNOSTICS Register Field Descriptions
BitFieldTypeResetDescription
15-5RESERVEDR0hThese bits are reserved
4-0FSM_LIVE_STATUSR0h

Current state of the functional state machine

0h = DISABLED

1h = LDO_STARTUP

2h = OTP_READ

3h = STANDBY

4h-Fh = BOOST_STARTUP

10h = NORMAL

11h = SHUTDOWN

12h = FAULT_RECOVERY

13h = ALL_LED_FAULT

7.6.1.12 PWM_INPUT_DIAGNOSTICS Register (Offset = 16h) [reset = 0h]

PWM_INPUT_DIAGNOSTICS is shown in Figure 7-34 and described in Table 7-25.

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Figure 7-34 PWM_INPUT_DIAGNOSTICS Register
1514131211109876543210
PWM_INPUT_STATUS
R-0h
Table 7-25 PWM_INPUT_DIAGNOSTICS Register Field Descriptions
BitFieldTypeResetDescription
15-0PWM_INPUT_STATUSR0h16-bit value for detected duty cycle of PWM input signal.

7.6.1.13 PWM_OUTPUT_DIAGNOSTICS Register (Offset = 18h) [reset = 0h]

PWM_OUTPUT_DIAGNOSTICS is shown in Figure 7-35 and described in Table 7-26.

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Figure 7-35 PWM_OUTPUT_DIAGNOSTICS Register
1514131211109876543210
PWM_OUTPUT_STATUS
R-0h
Table 7-26 PWM_OUTPUT_DIAGNOSTICS Register Field Descriptions
BitFieldTypeResetDescription
15-0PWM_OUTPUT_STATUSR0h16-bit value for configured duty cycle of PWM output signal.

7.6.1.14 LED_CURR_DIAGNOSTICS Register (Offset = 1Ah) [reset = 0h]

LED_CURR_DIAGNOSTICS is shown in Figure 7-36 and described in Table 7-27.

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Figure 7-36 LED_CURR_DIAGNOSTICS Register
15141312111098
RESERVEDLED_CURRENT_STATUS
R-0hR-0h
76543210
LED_CURRENT_STATUS
R-0h
Table 7-27 LED_CURR_DIAGNOSTICS Register Field Descriptions
BitFieldTypeResetDescription
15-12RESERVEDR0h

These bits are reserved.

11-0LED_CURRENT_STATUSR0h12-bit Current DAC Code that Brightness path is driving to OUT1-4 output.

7.6.1.15 ADAPT_BOOST_DIAGNOSTICS Register (Offset = 1Ch) [reset = 0h]

ADAPT_BOOST_DIAGNOSTICS is shown in Figure 7-37 and described in Table 7-28.

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Figure 7-37 ADAPT_BOOST_DIAGNOSTICS Register
15141312111098
RESERVEDVBOOST_STATUS
R-0hR-0h
76543210
VBOOST_STATUS
R-0h
Table 7-28 ADAPT_BOOST_DIAGNOSTICS Register Field Descriptions
BitFieldTypeResetDescription
15-11RESERVEDR0h

These bits are reserved.

10-0VBOOST_STATUSR0h

11-bit Boost Voltage Code that Adaptive Voltage Control Loop sending to Analog Boost Block.

In two-resistor method, Boost Output Voltage =((1+R1/R2)*1.21V)+(R1*18.9nA*VBOOST_STATUS)

7.6.1.16 AUTO_DETECT_DIAGNOSTICS Register (Offset = 1Eh) [reset = 0h]

AUTO_DETECT_DIAGNOSTICS is shown in Figure 7-38 and described in Table 7-29.

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Figure 7-38 AUTO_DETECT_DIAGNOSTICS Register
15141312111098
RESERVEDAUTO_PWM_FREQ_SELRESERVEDAUTO_LED_STRING_CFG
R-0hR-0hR-1hR-0h
76543210
RESERVEDAUTO_BOOST_FREQ_SELMODE_SEL
R-0hR-0hR-0h
Table 7-29 AUTO_DETECT_DIAGNOSTICS Register Field Descriptions
BitFieldTypeResetDescription
15RESERVEDR0hThis bit is reserved
14-12AUTO_PWM_FREQ_SELR0h

LED PWM frequency value from PWM_SEL resistor detection

0h = 152 Hz

1h = 305 Hz

2h = 610 Hz

3h = 1221 Hz

4h = 2441 Hz

5h = 4883 Hz

6h = 9766 Hz

7h = 19531 Hz

11RESERVEDR1hThis bit is reserved
10-8AUTO_LED_STRING_CFGR0h

LED string configuration from LED_SET resistor detection

0h = 4 separate strings

1h = 3 separate strings

2h = 2 separate strings

3h = 4 channel outputs connected in 2 groups to drive 2 strings

4h = 4 channel outputs connected together to drive 1 string

7-6RESERVEDR0hThese bits are reserved
5-3AUTO_BOOST_FREQ_SELR0h

Boost switching frequency value from PWM_FSET resistor detection

0h = 100 kHz

1h = 200 kHz

2h = 303 kHz

3h = 400 kHz

4h = 500 kHz

5h = 1818 kHz

6h = 2000 kHz

7h = 2222 kHz

2-0MODE_SELR0h

LED dimming MODE value from MODE detection

0h = PWM mode, I2C address 0x3B

1h = 12.5% hybrid dimming mode, I2C address 0x3B

2h = Constant current mode, I2C address 0x3B

3h = Direct PWM, I2C address 0x3B

4h = PWM mode, I2C address 0x3A

5h = 12.5% hybrid dimming mode, I2C address 0x3A

6h = Constant current mode, I2C address 0x3A

7h = Direct PWM, I2C address 0x3A