SLVSF65A December   2020  – May 2021 TPS92633-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Power Supply (SUPPLY)
        1. 7.3.1.1 Power-On Reset
        2. 7.3.1.2 Supply Current in Fault Mode
      2. 7.3.2  Enable and Shutdown (EN)
      3. 7.3.3  Reference Current (IREF)
      4. 7.3.4  Constant-Current Output and Setting (INx)
      5. 7.3.5  Analog Current Control (ICTRL)
        1. 7.3.5.1 Off-Board Brightness Binning Resistor
        2. 7.3.5.2 NTC Resistor
      6. 7.3.6  Thermal Sharing Resistor (OUTx and RESx)
      7. 7.3.7  PWM Control (PWMx)
      8. 7.3.8  Supply Control
      9. 7.3.9  Diagnostics
        1. 7.3.9.1 IREF Short-to-GND Detection
        2. 7.3.9.2 IREF Open Detection
        3. 7.3.9.3 LED Short-to-GND Detection
        4. 7.3.9.4 LED Open-Circuit Detection
        5. 7.3.9.5 Single LED Short-Circuit Detection (SLS_REF)
        6. 7.3.9.6 LED Open-Circuit and Single LED Short-Circuit Detection Enable (DIAGEN)
        7. 7.3.9.7 Low Dropout Operation
        8. 7.3.9.8 Over-Temperature Protection
      10. 7.3.10 FAULT Bus Output With One-Fails–All-Fail
      11. 7.3.11 FAULT Table
      12. 7.3.12 LED Fault Summary
      13. 7.3.13 IO Pins Inner Connection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Undervoltage Lockout, V(SUPPLY) < V(POR_rising)
      2. 7.4.2 Normal Operation V(SUPPLY) ≥ 4.5 V
      3. 7.4.3 Low-Voltage Dropout Operation
      4. 7.4.4 Fault Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 BCM Controlled Rear Lamp with One-Fails-All-Fail Setup
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Independent PWM Controlled Rear Lamp with Off Board LED and Binning Resistor
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.10 FAULT Bus Output With One-Fails–All-Fail

During normal operation, The FAULT pin of TPS92633-Q1 is weakly pulled up by an internal pullup current source, I(FAULT_pullup). If any fault scenario occurs, the FAULT pin is strongly pulled low by the internal pulldown current sink, I(FAULT_pulldown) to report out the fault alarm.

Meanwhile, the TPS92633-Q1 also monitors the FAULT pin voltage internally. If the FAULT pin of the TPS92633-Q1 is pulled low by external current sink below VIL(FAULT), the current output is turned off even though there is no fault detected on owned outputs. The device does not resume to normal operation until the FAULT pin voltage rises above VIH(FAULT).

Based on this feature, the TPS92633-Q1 device is able to construct a FAULT bus by tying FAULT pins from multiple TPS92633-Q1 devices to achieve one-fails-all-fail function as Figure 7-12 showing. The lower side TPS92633-Q1 (B) detects any kind of LED fault and pulls low the FAULT pin. The low voltage on FAULT pin is detected by upper side TPS926133-Q1 (A) because the FAULT pins are connected of two devices. The upper side TPS92633-Q1 (A) turns off all output current for each channel as a result. If the FAULT pins of each TPS92633-Q1 are all connected to drive the base of an external PNP transistor as illustrated in Figure 7-13, the one-fails–all-fail function is disabled and only the faulty channel is turned off.

GUID-48B0FC7C-2620-457A-BC41-2F53692066AD-low.gifFigure 7-12 FAULT Bus For One-Fails-All-Fail Application
GUID-4C4975DB-4A2C-43D8-813F-879E1B371DDE-low.gifFigure 7-13 FAULT Bus For One-Fails-Others-On Application