SLVSE03B April 2019 – February 2021 TPS929120-Q1
PRODUCTION DATA
The TPS929120-Q1 provides registers content lock feature to prevent unintended modification of registers. There are 4 register lock bits for different type of registers covering all registers. The 4 lock register bits is set to 1 as default, which means the master controller must the set lock bit to 0 before write operation to the corresponding registers. TI recommends locking the register after register writing operations.