DLPS039F December   2015  – April 2019 TPS99000-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Typical Standalone System
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions - Initialization, Clock, and Diagnostics
    2.     Pin Functions - Power and Ground
    3.     Pin Functions - Power Supply Management
    4.     Pin Functions - Illumination Control
    5.     Pin Functions - Serial Peripheral Interfaces
    6.     Pin Functions - Analog to Digital Converter
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics - Transimpedance Amplifier Parameters
    6. 6.6  Electrical Characteristics - Digital to Analog Converters
    7. 6.7  Electrical Characteristics - Analog to Digital Converter
    8. 6.8  Electrical Characteristics - FET Gate Drivers
    9. 6.9  Electrical Characteristics - Photo Comparator
    10. 6.10 Electrical Characteristics - Voltage Regulators
    11. 6.11 Electrical Characteristics - Temperature and Voltage Monitors
    12. 6.12 Electrical Characteristics - Current Consumption
    13. 6.13 Power-Up Timing Requirements
    14. 6.14 Power-Down Timing Requirements
    15. 6.15 Timing Requirements - Sequencer Clock
    16. 6.16 Timing Requirements - Host / Diagnostic Port SPI Interface
    17. 6.17 Timing Requirements - ADC Interface
    18. 6.18 Switching Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Illumination Control
        1. 7.3.1.1 Illumination System High Dynamic Range Dimming Overview
        2. 7.3.1.2 Illumination Control Loop
        3. 7.3.1.3 Continuous Mode Operation
          1. 7.3.1.3.1 Output Capacitance in Continuous Mode
          2. 7.3.1.3.2 Continuous Mode Driver Distortion and Blanking Current
          3. 7.3.1.3.3 Continuous Mode S_EN2 Dissipative Load Shunt Options
          4. 7.3.1.3.4 Continuous Mode Constant OFF Time
          5. 7.3.1.3.5 Continuous Mode Current Limit
        4. 7.3.1.4 Discontinuous Mode Operation
          1. 7.3.1.4.1 Discontinuous Mode Pulse Width Limit
          2. 7.3.1.4.2 COMPOUT_LOW Timer in Discontinuous Operation
          3. 7.3.1.4.3 Dimming Within Discontinuous Operation Range
          4. 7.3.1.4.4 Multiple Pulse Heights to Increase Bit Depth
          5. 7.3.1.4.5 TIA Gain Adjustment
          6. 7.3.1.4.6 Current Limit in Discontinuous Mode
          7. 7.3.1.4.7 CMODE Big Cap Mode in Discontinuous Operation
      2. 7.3.2 Over-Brightness Detection
        1. 7.3.2.1 Photo Feedback Monitor BIST
        2. 7.3.2.2 Excessive Brightness BIST
      3. 7.3.3 Analog to Digital Converter
        1. 7.3.3.1 Analog to Digital Converter Input Table
      4. 7.3.4 Power Sequencing and Monitoring
        1. 7.3.4.1 Power Monitoring
      5. 7.3.5 DMD Mirror Voltage Regulator
      6. 7.3.6 Low Dropout Regulators
      7. 7.3.7 System Monitoring Features
        1. 7.3.7.1 Windowed Watchdog Circuits
        2. 7.3.7.2 Die Temperature Monitors
        3. 7.3.7.3 External Clock Ratio Monitor
      8. 7.3.8 Communication Ports
        1. 7.3.8.1 Serial Peripheral Interface (SPI)
    4. 7.4 Device Functional Modes
      1. 7.4.1 OFF
      2. 7.4.2 STANDBY
      3. 7.4.3 POWERING_DMD
      4. 7.4.4 DISPLAY_RDY
      5. 7.4.5 DISPLAY_ON
      6. 7.4.6 PARKING
      7. 7.4.7 SHUTDOWN
    5. 7.5 Register Maps
      1. 7.5.1 System Status Registers
      2. 7.5.2 ADC Control
      3. 7.5.3 General Fault Status
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 HUD
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Application Design Considerations
          1. 8.2.1.2.1 Photodiode Considerations
          2. 8.2.1.2.2 LED Current Measurement
          3. 8.2.1.2.3 Setting the Current Limit
          4. 8.2.1.2.4 Input Voltage Variation Impact
          5. 8.2.1.2.5 Discontinuous Mode Photo Feedback Considerations
          6. 8.2.1.2.6 Transimpedance Amplifiers (TIAs, Usage, Offset, Dark Current, Ranges, RGB Trim)
      2. 8.2.2 Headlight
        1. 8.2.2.1 Design Requirements
  9. 9 Power Supply Recommendations
    1. 9.1 TPS99000-Q1 Power Supply Architecture
    2. 9.2 TPS99000-Q1 Power Outputs
    3. 9.3 Power Supply Architecture
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Power/High Current Signals
      2. 10.1.2 Sensitive Analog Signals
      3. 10.1.3 High Speed Digital Signals
      4. 10.1.4 High Power Current Loops
      5. 10.1.5 Kelvin Sensing Connections
      6. 10.1.6 Ground Separation
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Package Option Addendum
      1. 12.1.1 Tape and Reel Information
      2. 12.1.2 Mechanical Drawings

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2.2.1 Design Requirements

The DLPC230-Q1 is a controller for the DMD and the light sources in headlight applications. It receives input video from the host and synchronizes DMD and light source timing in order to achieve the desired video. The DLPC230-Q1 formats input video data that is displayed on the DMD. It synchronizes these video segments with light source timing in order to create video with grayscale shading.

The DLPC230-Q1 receives inputs from a host processor in the vehicle. The host provides commands and input video data. R/W commands can be sent using either the I2C bus or SPI bus. The bus that is not being used for R/W commands can be used as a read-only bus for diagnostic purposes. Input video can be sent over an OpenLDI bus or a parallel 24-bit bus. The 24-bit bus can be limited to only 8-bits of data for single light source systems such as headlights. The SPI flash memory provides the embedded software for the DLPC230-Q1’s ARM core, any calibration data, and default settings. The TPS99000-Q1 provides diagnostic and monitoring information to the DLPC230-Q1 using an SPI bus and several other control signals such as PARKZ, INTZ, and RESETZ to manage power-up and power-down sequencing. The TMP411 uses an I2C interface to provide the DMD array temperature to the DLPC230-Q1.

The outputs of the DLPC230-Q1 are configuration and monitoring commands to the TPS99000-Q1, timing controls to the LED or laser driver, control signals to the DMD, and monitoring and diagnostics information to the host processor. The DLPC230-Q1 communicates with the TPS99000-Q1 over an SPI bus. It uses this to configure the TPS99000-Q1 and to read monitoring and diagnostics information from the TPS99000-Q1. The DLPC230-Q1 sends drive enable signals to the LED or laser driver, and synchronizes this with the DMD mirror timing. The control signals to the DMD are sent using a sub-LVDS interface.

The TPS99000-Q1 is a highly integrated mixed-signal IC that controls DMD power, the timing and amplitude of the LEDs or lasers, and provides monitoring and diagnostics information for the headlight system. The power sequencing and monitoring blocks of the TPS99000-Q1 properly power up the DMD and provide accurate DMD voltage rails, and then monitor the system’s power rails during operation. The integration of these functions into one IC significantly reduces design time and complexity. The TPS99000-Q1 also has several output signals that can be used to control a variety of LED or laser driver topologies. The TPS99000-Q1 also has several general-purpose ADCs that designers can use for system level monitoring, such as over-brightness detection.

The TPS99000-Q1 receives inputs from the DLPC230-Q1, the power rails it monitors, the host processor, and potentially several other ADC ports. The DLPC230-Q1 sends configuration and control commands to the TPS99000-Q1 over an SPI bus and several other control signals. The TPS99000-Q1 includes watchdogs to monitor the DLPC230-Q1 and ensure that it is operating as expected. The power rails are monitored by the TPS99000-Q1 in order to detect power failures or glitches and request a proper power down of the DMD in case of an error. The host processor can read diagnostics information from the TPS99000-Q1 using a dedicated SPI bus. Additionally the host can request the image to be turned on or off using a PROJ_ON signal. Lastly, the TPS99000-Q1 has several general-purpose ADCs that can be used to implement system level monitoring functions.

The outputs of the TPS99000-Q1 are diagnostic information and error alerts to the DLPC230-Q1, and control signals to the LED or laser driver. The TPS99000-Q1 can output diagnostic information to the host and the DLPC230-Q1 over two SPI busses. In case of critical system errors, such as power loss, it outputs signals to the DLPC230-Q1 that trigger power down or reset sequences. It also has output signals that can be used to implement various LED or laser driver topologies.

The DMD is a micro-electro-mechanical system (MEMS) device that receives electrical signals as an input (video data), and produces a mechanical output (mirror position). The electrical interface to the DMD is a sub-LVDS interface with the DLPC230-Q1. The mechanical output is the state of more than 1.3 million mirrors in the DMD array that can be tilted ±12°. In a projection system the mirrors are used as pixels in order to display an image.