DLPS039F December 2015 – April 2019 TPS99000-Q1
The TPS99000-Q1 has three serial interfaces that are used to transmit data into and out of the device. All these of these interfaces have a maximum clock speed of 30 MHz. In order to help prevent against high levels of EMI emissions, these signals should be laid out with impedance matched, low inductance traces. In particular, the three clocks for these interfaces should be low inductance, and if a cable or a connector is used, the clock signal should be adjacent to the ground signal return.
|27||SPI1_CLK||Clock (30 MHz)|
|34||SPI2_CLK||Clock (Up to 30 MHz)|
|17||SEQ_CLK||Clock (30 MHz)|
To avoid crosstalk, a PCB trace spacing requirement is suggested, such as the “3 W rule” which specifies that if the trace width is 5 mils, then traces should be spaced out at least 15 mils from center to center. On TI’s PCB design, the typical trace spacing was 20 mils.
As explained in the Discontinuous Mode Operation section, the COMPOUT signal indicates to the DLPC230-Q1 that the discontinuous mode light pulses have been completed. It is critical that this signal has a fast response time in order to create small light pulses. For this reason, it is recommended that this signal has a limited trace capacitance, as mentioned in Table 12.