SNVSBT8 March   2021 TPSM13604H

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
      1. 7.1.1 COT Control Circuit Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Output Overvoltage Comparator
      2. 7.3.2 Current Limit
      3. 7.3.3 Thermal Protection
      4. 7.3.4 Zero Coil Current Detection
      5. 7.3.5 Prebiased Start-up
    4. 7.4 Device Functional Modes
      1. 7.4.1 Discontinuous Conduction and Continuous Conduction Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Design Steps for the TPSM13604 Application
          1. 8.2.2.1.1 Enable Divider, RENT, and RENB Selection
          2. 8.2.2.1.2 Output Voltage Selection
          3. 8.2.2.1.3 Soft-Start Capacitor, CSS, Selection
          4. 8.2.2.1.4 Output Capacitor, CO, Selection
            1. 8.2.2.1.4.1 Capacitance
            2. 8.2.2.1.4.2 ESR
          5. 8.2.2.1.5 Input Capacitor, CIN, Selection
          6. 8.2.2.1.6 ON-Time, RON, Resistor Selection
            1. 8.2.2.1.6.1 Discontinuous Conduction and Continuous Conduction Mode Selection
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Power Module SMT Guidelines
    2. 10.2 Layout Example
      1. 10.2.1 Power Dissipation and Board Thermal Requirements
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Glossary
    7. 11.7 Electrostatic Discharge Caution
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information
8.2.2.1.5 Input Capacitor, CIN, Selection

The TPSM13604 module contains an internal 0.47-µF input ceramic capacitor. Additional input capacitance is required externally to the module to handle the input ripple current of the application. This input capacitance must be as close as possible to the module. Input capacitor selection is generally directed to satisfy the input ripple current requirements rather than by capacitance value.

Worst-case input ripple current rating is dictated by Equation 12.

Equation 12. I(CIN(RMS)) ≊ 1 / 2 × IO × √ (D / 1-D)

where

  • D ≊ VO / VIN

As a point of reference, the worst-case ripple current occurs when the module is presented with full load current and when VIN = 2 × VO.

Recommended minimum input capacitance is 10-µF X7R ceramic with a voltage rating at least 25% higher than the maximum applied input voltage for the application. TI also recommends to pay attention to the voltage and temperature deratings of the capacitor selected. Note that ripple current rating of ceramic capacitors can be missing from the capacitor data sheet and you may have to contact the capacitor manufacturer for this rating.

If the system design requires a certain maximum value of input ripple voltage ΔVIN to be maintained, then Equation 13 can be used.

Equation 13. CIN ≥ IO × D × (1–D) / fSW-CCM × ΔVIN

If ΔVIN is 2% of VIN for a 12-V input to a 9-V output application this equals 120 mV and fSW = 300 kHz.

Equation 14. CIN ≥ 4 A × 9 V / 12 V × (1– 9 V/12 V) / (300000 × 0.240 V)
Equation 15. CIN ≥ 10 μF

Additional bulk capacitance with higher ESR can be required to damp any resonant effects of the input capacitance and parasitic inductance of the incoming supply lines.