SNVSBF6B October   2019  – December 2020 TPSM265R1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Typical Characteristics (VIN = 5 V)
    7. 6.7  Typical Characteristics (VIN = 12 V)
    8. 6.8  Typical Characteristics (VIN = 24 V)
    9. 6.9  Typical Characteristics (VIN = 48 V)
    10. 6.10 Typical Characteristics (VIN = 65 V)
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Adjustable Output Voltage (FB)
      2. 7.3.2 Input Capacitor Selection
      3. 7.3.3 Output Capacitor Selection
      4. 7.3.4 Precision Enable (EN), Undervoltage Lockout (UVLO), and Hysteresis (HYS)
      5. 7.3.5 PFM Operation
      6. 7.3.6 Power Good (PGOOD)
      7. 7.3.7 Configurable Soft Start (SS)
        1. 7.3.7.1 Prebiased Start-up
      8. 7.3.8 Overcurrent Protection (OCP)
      9. 7.3.9 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Standby Mode
      3. 7.4.3 Active Mode
      4. 7.4.4 Sleep Mode
  8. 8 Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Output Voltage Setpoint
        3. 8.2.2.3 Input Capacitors
        4. 8.2.2.4 Output Capacitor Selection
        5. 8.2.2.5 UVLO Programming
        6. 8.2.2.6 Soft-Start Capacitor – CSS
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
      1. 10.2.1 Theta JA versus PCB Area
      2. 10.2.2 Package Specifications
      3. 10.2.3 EMI
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
      3. 11.1.3 Custom Design With WEBENCH® Tools
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.1 Adjustable Output Voltage (FB)

The TPSM265R1 has three voltage feedback options: fixed 3.3 V, fixed 5 V, and adjustable 1.223 V to 15 V. The fixed 3.3-V and 5-V versions include internal feedback resistors that sense the output directly through the SENSE+ pin; the adjustable voltage option senses the output through an external resistor divider connected from the output to the FB pin.

Setting the output voltage of the adjustable option requires two resistors: RFBT and RFBB (see Figure 7-1). Connect RFBT between VOUT, at the regulation point, and the FB pin. Connect RFBB between the FB pin and GND (pin 6). A resistor divider programs the ratio from output voltage VOUT to FB. The recommended value of RFBT is 100 kΩ. The value for RFBB can be calculated using Equation 1.

Equation 1. GUID-107AAED3-14FD-471C-917B-1A9C50F1A171-low.gif
GUID-D26C7F0E-F809-4C5A-A797-1A2F54B1C0DE-low.gifFigure 7-1 FB Resistor Divider
Table 7-1 Standard RFBB Values
VOUT (V)RFBB (kΩ) (1)VOUT (V)RFBB (kΩ) (1)
1.223open3.359.0
1.54425.032.4
1.82107.519.6
2.01581014.0
2.595.31211.3
3.068.1158.87
(1) RFBT = 100 kΩ

Selecting an RFBT value of 100 kΩ is recommended for most applications. A larger RFBT consumes less DC current, which is mandatory if light-load efficiency, is critical. However, RFBT larger than 1 MΩ is not recommended as the feedback path becomes more susceptible to noise. High feedback resistance generally requires more careful layout of the feedback path. It is important to keep the feedback trace as short as possible while keeping the feedback trace away from the noisy area of the PCB. For more layout recommendations, see Section 10.