SLUSEY7 December 2022 TPSM82816
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
The soft-start circuitry controls the output voltage slope during start-up. This action avoids excessive inrush current and ensures a controlled output voltage rise time. This action also prevents unwanted voltage drops from high impedance power sources or batteries. When EN is set high, the device starts switching after a delay of about 270 μs. Then VOUT rises with a slope controlled by an external capacitor connected to the SS/TR pin.
A capacitor connected from SS/TR to GND is charged with 10 µA by an internal current source during soft start until it reaches the reference voltage of 0.6 V. After reaching 0.6 V, the SS/TR pin voltage is clamped internally while the SS/TR pin voltage keeps rising to a maximum of about 3.3 V. The capacitance required to set a certain ramp-time (tramp) is:
A voltage applied at the SS/TR pin can also be used to track a master voltage. The output voltage follows this voltage in both directions up and down in forced PWM mode. In PSM mode, the output voltage decreases based on the load current. An external voltage applied on SS/TR is internally clamped to the feedback voltage (0.6 V). TI recommends to set the final value of the external voltage on SS/TR to be slightly above 0.6 V to make sure the device operates with its internal reference voltage when the power-up sequencing is finished. See Voltage Tracking.