SLVSDF3F MARCH 2017 – JANUARY 2019 TPSM846C23
The TPSM846C23 device includes both output overvoltage protection and output undervoltage protection capability by comparing the FB pin voltage to internal selectable pre-set voltages, as defined by the
PCT_OV_UV_WRN_FLT_LIMITS (MFR_SPECIFIC_07) (D7h) command.
If the FB pin voltage rises above the output overvoltage-protection threshold, the device terminates normal switching and turns on the low-side MOSFET to discharge the output capacitor and prevent further increases in the output voltage. The device also declares an OV fault, flagging the appropriate status registers, triggering SMBALERT if it is not masked. Then the device enters continuous-restart-hiccup mode or latches off according to the VOUT_OV_FAULT_RESPONSE command. The TPSM846C23 device responds to the output overvoltage condition immediately upon VIN power up and BP6 regulator voltage above its own UVLO of 3.73 V (typical). The VOUT_OV_FAULT_RESPONSE can also be set to ignore the output overvoltage fault and continue without interruption. Under this configuration, the control loop continues to respond and adjust PWM duty cycle to keep output voltage within regulation.
If the FB pin voltage falls below the undervoltage protection level after soft start has completed, the device terminates normal switching and forces both the high-side and low-side MOSFETs off and awaits an external reset or begins a hiccup time-out delay prior to restart, depending on the value of the VOUT_UV_FAULT_RESPONSE command. The device also declares a UV fault by flagging the appropriate status registers and triggering SMBALERT if it is not masked. The VOUT_UV_FAULT_RESPONSE can also be set to ignore the output undervoltage fault and continue without interruption for debug purpose.
Table 7 summarizes the fault-response scheme.