SLVSE26B November 2017 – April 2018 TPSM84824
The TPSM84824 implements internal UVLO circuitry on the VIN pin. The device is disabled when the VIN pin voltage falls below the internal VIN UVLO threshold. The internal VIN UVLO rising threshold is 4.1 V (typical) with a typical hysteresis of 200 mV.
Applications may require a higher UVLO threshold to prevent early turnon, for sequencing requirements, or to prevent input current draw at lower input voltages. An external resistor divider can be added to the EN pin to adjust the UVLO threshold higher. The external resistor divider can be configured as shown in Figure 21. Table 9 lists standard values for RUVLO1 and RUVLO2 to adjust the UVLO voltage higher.
|VIN UVLO (V)||4.5||5||6||7||8||9||10||11||12|