SLVSFQ9A August   2021  – November 2021 TPSM8A28 , TPSM8A29

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Internal VCC LDO and Using External Bias on VCC Pin
      2. 7.3.2  Enable
      3. 7.3.3  Output Voltage Setting
        1. 7.3.3.1 Remote Sense
      4. 7.3.4  Internal Fixed Soft Start and External Adjustable Soft Start
      5. 7.3.5  External REFIN for Output Voltage Tracking
      6. 7.3.6  Frequency and Operation Mode Selection
      7. 7.3.7  D-CAP3™ Control
      8. 7.3.8  Low-Side FET Zero-Crossing
      9. 7.3.9  Current Sense and Positive Overcurrent Protection
      10. 7.3.10 Low-Side FET Negative Current Limit
      11. 7.3.11 Power Good
      12. 7.3.12 Overvoltage and Undervoltage Protection
      13. 7.3.13 Out-Of-Bounds (OOB) Operation
      14. 7.3.14 Output Voltage Discharge
      15. 7.3.15 UVLO Protection
      16. 7.3.16 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Auto-Skip Eco-Mode Light Load Operation
      2. 7.4.2 Forced Continuous-Conduction Mode
      3. 7.4.3 Powering the Device From a 12-V Bus
      4. 7.4.4 Powering the Device From a 5.0-V Bus
      5. 7.4.5 Powering the Device From a Split-Rail Configuration
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Output Voltage Setting Point
        2. 8.2.2.2  Choose the Inductor
        3. 8.2.2.3  Set the Current Limit (TRIP)
        4. 8.2.2.4  Choose the Output Capacitor
        5. 8.2.2.5  Choose the Input Capacitors (CIN)
        6. 8.2.2.6  Soft-Start Capacitor (SS/REFIN Pin)
        7. 8.2.2.7  EN Pin Resistor Divider
        8. 8.2.2.8  VCC Bypass Capacitor
        9. 8.2.2.9  BOOT Capacitor
        10. 8.2.2.10 PGOOD Pullup Resistor
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
      1. 10.2.1 Thermal Performance on the TI EVM
    3. 10.3 EMI
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2.3 Application Curves

VOUT = 0.6 V fsw = 600 kHz Internal bias FCCM
Figure 8-2 Efficiency
VOUT = 1.0 V fsw = 600 kHz Internal bias FCCM
Figure 8-4 Efficiency
VOUT = 1.8 V fsw = 600 kHz Internal bias FCCM
Figure 8-6 Efficiency
VOUT = 3.3 V fsw = 600 kHz Internal bias FCCM
Figure 8-8 Efficiency
VIN = 12 V VOUT = 1 V Internal bias FCCM
Figure 8-10 Efficiency
VOUT = 0.8 V fSW = 600 kHz Internal bias FCCM
Figure 8-12 Load Regulation
VOUT = 1.2 V fSW = 600 kHz Internal bias FCCM
Figure 8-14 Load Regulation
VOUT = 2.5 V fSW = 600 kHz Internal bias FCCM
Figure 8-16 Load Regulation
VOUT = 5 V fSW = 600 kHz Internal bias FCCM
Figure 8-18 Load Regulation
VIN = 12 V VOUT = 1.0 V Internal bias FCCM
Figure 8-20 Switching Frequency
VIN = 12 A fSW = 600 kHz Internal bias FCCM
Figure 8-22 Switching Frequency
VIN = 12 V fSW = 600 kHz Internal bias FCCM
Figure 8-24 Switching Frequency
VOUT = 0.8 V fsw = 600 kHz Internal bias FCCM
Figure 8-3 Efficiency
VOUT = 1.2 V fsw = 600 kHz Internal bias FCCM
Figure 8-5 Efficiency
VOUT = 2.5 V fsw = 600 kHz Internal bias FCCM
Figure 8-7 Efficiency
VOUT = 5 V fsw = 600 kHz Internal bias FCCM
Figure 8-9 Efficiency
VOUT = 0.6 V fSW = 600 kHz Internal bias FCCM
Figure 8-11 Load Regulation
VOUT = 1.0 V fSW = 600 kHz Internal bias FCCM
Figure 8-13 Load Regulation
VOUT = 1.8 V fSW = 600 kHz Internal bias FCCM
Figure 8-15 Load Regulation
VOUT = 3.3 V fSW = 600 kHz Internal bias FCCM
Figure 8-17 Load Regulation
VOUT = 1.0 V IOUT = 5 A Internal bias fSW = 600 kHz FCCM
Figure 8-19 Line Regulation
IOUT = 5 A fSW = 600 kHz Internal bias FCCM
Figure 8-21 Switching Frequency
VIN = 12 V fSW = 1000 kHz Internal bias FCCM
Figure 8-23 Switching Frequency
VIN = 12 V fSW = 1000 kHz Internal bias FCCM
Figure 8-25 Switching Frequency

In the following images, all measurements taken with VIN = 12 V, VOUT = 1 V, fSW = 600 kHz, internal bias, TAMB = 25°C

GUID-20210408-CA0I-KTMG-J7VT-W7SRK5MJLJQ9-low.png
IOUT = 0 A FCCM
Figure 8-26 Output Voltage Ripple, VRIPPLE = 6.4 mV
GUID-20210408-CA0I-7QF9-FPJH-4QQSNFXSJMDM-low.png
IOUT = 0 A DCM
Figure 8-28 Output Voltage Ripple, VRIPPLE = 20.3 mV
GUID-20210408-CA0I-88HZ-VDN1-6JW8X0FZQBLJ-low.png
IOUT = 1 A DCM
Figure 8-30 Output Voltage Ripple, VRIPPLE = 8.8 mV
GUID-20210408-CA0I-FXBX-VV7C-K05BMNMPXW8F-low.png
IOUT = 15 A FCCM
Figure 8-32 Startup Through VIN (Enable Floating)
GUID-20210408-CA0I-MSGP-RTTP-PGFZH9GZRHP5-low.png
IOUT = 15 A FCCM
Figure 8-34 Startup Through Enable
GUID-20210408-CA0I-KBV0-SCPT-THTDWT0N6291-low.png
IOUT = 15 A FCCM
Figure 8-36 Shutdown Through Enable
GUID-20210408-CA0I-GWLN-FLQF-WXPLFM79DZZS-low.png
IOUT = 15 A FCCM
Figure 8-27 Output Voltage Ripple, VRIPPLE = 7.6 mV
GUID-20210408-CA0I-J42X-QV68-MRGDLPTCJGZ6-low.png
IOUT = 0.5 A DCM
Figure 8-29 Output Voltage Ripple, VRIPPLE = 10.4 mV
GUID-20210408-CA0I-NVHL-FB6P-Z9DBXNZLV9GS-low.png
IOUT = 0 A DCM
Figure 8-31 Startup Through VIN (Enable Floating)
GUID-20210408-CA0I-Z7FN-NXV7-VRDBVTW3SZGR-low.png
IOUT = 0 A DCM
Figure 8-33 Startup Through Enable
GUID-20210408-CA0I-VV9L-83XJ-KSPT50WTWFB8-low.png
IOUT = 0 A FCCM
Figure 8-35 Startup Through Enable into Prebiased Load
GUID-20210408-CA0I-QPM3-JKQH-QQWXVVNTKTHL-low.png
ISTEP = 7.5 A - 15 A - 7.5 A 5 A/μs
Figure 8-37 Transient Response, VPP = 74 mV