SCDS307D September   2010  – October 2022 TS3L501E

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics for 1000 Base-T Ethernet Switching
    6. 6.6 Electrical Characteristics for 10/100 Base-T Ethernet Switching
    7. 6.7 Switching Characteristics
    8. 6.8 Dynamic Characteristics
    9. 6.9 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Enable and Disable Times
    2. 7.2 Skew
    3. 7.3 HP8753ES Setup
    4. 7.4 HP8753ES Setup
    5. 7.5 HP8753ES Setup
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.4 Thermal Information

THERMAL METRIC(1)TS3L501EUNIT
RUA (WQFN)
42 PINS
RθJAJunction-to-ambient thermal resistance(2)30.9°C/W
RθJC(top)Junction-to-case (top) thermal resistance12.8°C/W
RθJBJunction-to-board thermal resistance5.2°C/W
ψJTJunction-to-top characterization parameter0.2°C/W
ψJBJunction-to-board characterization parameter5°C/W
RθJC(bot)Junction-to-case (bottom) thermal resistance1.5°C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.
(2) The package thermal impedance is calculated in accordance with JESD 51-7.