SCDS300D July   2010  – August 2016 TS3USB221A-Q1

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Dynamic Electrical Characteristics: VCC = 3.3 V
    7. 6.7  Dynamic Electrical Characteristics: VCC = 2.5 V
    8. 6.8  Switching Characteristics: VCC = 3.3 V
    9. 6.9  Switching Characteristics: VCC = 2.5 V
    10. 6.10 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Low Power Mode
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Community Resource
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Detailed Description

8.1 Overview

The TS3USB221A-Q1 device is a 2-channel SPDT switch specially designed for the switching of high-speed USB 2.0 signals in automotive applications, such as USB hubs. The wide bandwidth (900 MHz) of this switch allows signals to pass with minimum edge and phase distortion. The device multiplexes differential outputs from a USB host device to one of two corresponding outputs. The switch is bidirectional and offers little or no attenuation of the high-speed signals at the outputs. The device also has a low power mode that will reduce the power consumption to 1 µA for portable applications with a battery or limited power budget.

The device is designed for low bit-to-bit skew and high channel-to-channel noise isolation, and is compatible with various standards, such as high-speed USB 2.0 (480 Mbps).

The TS3USB221A-Q1 device integrates ESD protection cells on all pins, is available in a tiny UQFN package
(2 mm × 1.5 mm) and is characterized over the free air temperature range from –40°C to 125°C.

8.2 Functional Block Diagram

TS3USB221A-Q1 bd_cds277.gif
Figure 15. Block Diagram
TS3USB221A-Q1 simp_schem_cds277.gif
EN is the internal enable signal applied to the switch.
Figure 16. Simplified Schematic of Each FET Switch (SW)

8.3 Feature Description

8.3.1 Low Power Mode

The TS3USB221A-Q1 has a low power mode that reduces the power consumption to 1 µA while the devices is not in use. To put the device in low power mode and disable the switch, the bus-switch enable pin OE must be supplied with a logic High signal.

8.4 Device Functional Modes

Table 1 lists the functions of this device.

Table 1. Truth Table

S OE FUNCTION
X H Disconnect
L L D = 1D
H L D = 2D