SLDS250 December   2019 TUSS4440

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     TUSS4440 Application Diagram
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1      Absolute Maximum Ratings
    2. 6.2      ESD Ratings
    3. 6.3      Recommended Operating Conditions
    4. 6.4      Thermal Information
    5. 6.5      Power-Up Characterstics
    6. 6.6      Transducer Drive
    7. 6.7      Receiver Characteristics
    8. Table 1. Echo Interrupt Comparator Characteristics
    9. 6.8      Digital I/O Characteristics
    10. 6.9      Switching Characteristics
    11. 6.10     Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Excitation Power Supply (VDRV)
      2. 7.3.2 Burst Generation
        1. 7.3.2.1 Burst Generation Diagnostics
      3. 7.3.3 Transformer Transducer Drive
      4. 7.3.4 Analog Front End
    4. 7.4 Device Functional Modes
    5. 7.5 Programming
    6. 7.6 Register Maps
      1. 7.6.1 REG_USER Registers
        1. 7.6.1.1  BPF_CONFIG_1 Register (Address = 0x10) [reset = 0x0]
          1. Table 8. BPF_CONFIG_1 Register Field Descriptions
        2. 7.6.1.2  BPF_CONFIG_2 Register (Address = 0x11) [reset = 0x0]
          1. Table 9. BPF_CONFIG_2 Register Field Descriptions
        3. 7.6.1.3  DEV_CTRL_1 Register (Address = 0x12) [reset = 0x0]
          1. Table 10. DEV_CTRL_1 Register Field Descriptions
        4. 7.6.1.4  DEV_CTRL_2 Register (Address = 0x13) [reset = 0x0]
          1. Table 11. DEV_CTRL_2 Register Field Descriptions
        5. 7.6.1.5  DEV_CTRL_3 Register (Address = 0x14) [reset = 0x0]
          1. Table 12. DEV_CTRL_3 Register Field Descriptions
        6. 7.6.1.6  VDRV_CTRL Register (Address = 0x16) [reset = 0x20]
          1. Table 13. VDRV_CTRL Register Field Descriptions
        7. 7.6.1.7  ECHO_INT_CONFIG Register (Address = 0x17) [reset = 0x7]
          1. Table 14. ECHO_INT_CONFIG Register Field Descriptions
        8. 7.6.1.8  ZC_CONFIG Register (Address = 0x18) [reset = 0x14]
          1. Table 15. ZC_CONFIG Register Field Descriptions
        9. 7.6.1.9  XFMR_DRV_LIM Register (Address = 0x19) [reset = 0x0]
          1. Table 16. XFMR_DRV_LIM Register Field Descriptions
        10. 7.6.1.10 BURST_PULSE Register (Address = 0x1A) [reset = 0x0]
          1. Table 17. BURST_PULSE Register Field Descriptions
        11. 7.6.1.11 TOF_CONFIG Register (Address = 0x1B) [reset = 0x0]
          1. Table 18. TOF_CONFIG Register Field Descriptions
        12. 7.6.1.12 DEV_STAT Register (Address = 0x1C) [reset = 0x0]
          1. Table 19. DEV_STAT Register Field Descriptions
        13. 7.6.1.13 DEVICE_ID Register (Address = 0x1D) [reset = X]
          1. Table 20. DEVICE_ID Register Field Descriptions
        14. 7.6.1.14 REV_ID Register (Address = 0x1E) [reset = 0x2]
          1. Table 21. REV_ID Register Field Descriptions
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Transformer Drive Configuration Options
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Transducer Driving Voltage
          2. 8.2.1.2.2 Transducer Driving Frequency
          3. 8.2.1.2.3 Transducer Pulse Count
          4. 8.2.1.2.4 Transformer Turns Ratio
          5. 8.2.1.2.5 Transformer Saturation Current and Main Voltage Rating
        3. 8.2.1.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Features

  • Integrated driver for transformer driven transducers and receiver stage with analog output for ultrasound applications
  • 86-dB input dynamic range analog front-end
    • First stage low noise amplifier adjustable to 10, 12.5, 15 and 20 V/V
    • Configurable bandpass filter from 40 KHz to 500 KHz
    • Wide-band logarithmic amplifier
  • Supported transducer frequencies (controlled by external clock)
    • 40 KHz to 400 KHz
  • For low-power applications
    • Standby mode: 1.7 mA (typical)
    • Sleep mode: 220 µA (typical)
  • Configurable drive stage:
    • Complimentary low-side drivers with current limit for transformer based transducer excitation
    • Configurable burst patterns using IO1 and IO2 pins
  • Outputs:
    • Voltage output of the demodulated echo envelope on VOUT
    • Input signal zero crossing comparator output on OUT3 pin
    • Programmable VOUT threshold crossing on OUT4 pin
  • Serial Peripheral Interface (SPI) for configuration by microcontroller (MCU)