SLOSE40 June   2021 TX7516

ADVANCE INFORMATION  

  1. 1Features
  2. 2Applications
  3. 3Description
  4. 4Description (continued)
  5. 5Device and Documentation Support
    1. 5.1 Document Support
    2. 5.2 Receiving Notification of Documentation Updates
    3. 5.3 Support Resources
    4. 5.4 Trademarks
    5. 5.5 Electrostatic Discharge Caution
    6. 5.6 Glossary
  6. 6Mechanical, Packaging, and Orderable Information
    1. 6.1 Mechanical Data

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • ALH|144
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Features

  • Transmitter supports:
    • 16-channel 5-level pulser and active transmit/receive (T/R) switch
  • 5-level pulser:
    • Maximum output voltage: ±100 V
    • Minimum output voltage: ±1 V
    • Maximum output current: 2 A
    • Support 4A output current mode.
    • True return to zero to discharge output to ground
    • Second harmonic of –45 dBc at 5 MHz
    • –3-dB Bandwidth with 1-kΩ || 240-pF load
      • 20 MHz for a ±100-V supply
      • 25 MHz for a ±70-V supply
      • 35 MHz for a ±100-V supply in 4A mode
    • Integrated jitter: 100 fs measured from 100 Hz to 20 kHz
    • CW mode close-in phase noise: –154 dBc/Hz at 1 kHz offset for 5-MHz signal
    • Very low receive power: 1mW/ch
  • Active transmit/receive (T/R) switch with:
    • Turnon resistance of 8 Ω
    • Turnon and Turnoff time: 100 ns
    • Transient glitch: 10 mVPP
  • On-chip beam former with:
    • Channel based T/R switch on and off controls
    • Delay resolution: half beamformer clock period, minimum 2 ns
    • Maximum delay: 214 beamformer clock period
    • Maximum beamformer clock speed: 320 MHz
    • Per channel pattern control with 2K distinct level.
    • Global and local repeat pattern, enabling long duration patterns for Shear Wave imaging
    • Supports 120 delay profiles
  • High-speed (400 MHz maximum), 2-lane LVDS serial programming interface.
    • Low programming time: < 500 ns for delay profile update
    • 32-bit Checksum feature to detect wrong SPI writes
  • Supports CMOS serial programming interface (50 MHz maximum)
  • Internal temperature sensor and automatic thermal shutdown
  • No specific power sequencing requirement
  • Error flag register to detect faulty conditions
  • Integrated passives for the floating supplies and bias voltages
  • Small package: FC-BGA-144 (10 mm × 10 mm) with 0.8-mm pitch