SLUS223G April   1997  – July 2022 UC1842 , UC1843 , UC1844 , UC1845 , UC2842 , UC2843 , UC2844 , UC2845 , UC3842 , UC3843 , UC3844 , UC3845

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1  Detailed Pin Description
        1. 8.3.1.1 COMP
        2. 8.3.1.2 VFB
        3. 8.3.1.3 ISENSE
        4. 8.3.1.4 RT/CT
        5. 8.3.1.5 GROUND
        6. 8.3.1.6 OUTPUT
        7. 8.3.1.7 VCC
        8. 8.3.1.8 VREF
      2. 8.3.2  Pulse-by-Pulse Current Limiting
      3. 8.3.3  Current-Sense
      4. 8.3.4  Error Amplifier With Low Output Resistance
      5. 8.3.5  Undervoltage Lockout
      6. 8.3.6  Oscillator
      7. 8.3.7  Synchronization
      8. 8.3.8  Shutdown Technique
      9. 8.3.9  Slope Compensation
      10. 8.3.10 Soft Start
      11. 8.3.11 Voltage Mode
    4. 8.4 Device Functional Modes
      1. 8.4.1 Normal Operation
      2. 8.4.2 UVLO Mode
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Open-Loop Test Fixture
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1  Input Bulk Capacitor and Minimum Bulk Voltage
        2. 9.2.2.2  Transformer Turns Ratio and Maximum Duty Cycle
        3. 9.2.2.3  Transformer Inductance and Peak Currents
        4. 9.2.2.4  Output Capacitor
        5. 9.2.2.5  Current Sensing Network
        6. 9.2.2.6  Gate Drive Resistor
        7. 9.2.2.7  VREF Capacitor
        8. 9.2.2.8  RT/CT
        9. 9.2.2.9  Start-Up Circuit
        10. 9.2.2.10 Voltage Feedback Compensation
          1. 9.2.2.10.1 Power Stage Poles and Zeroes
          2. 9.2.2.10.2 Slope Compensation
          3. 9.2.2.10.3 Open-Loop Gain
          4. 9.2.2.10.4 Compensation Loop
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Feedback Traces
      2. 11.1.2 Bypass Capacitors
      3. 11.1.3 Compensation Components
      4. 11.1.4 Traces and Ground Planes
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Start-Up Circuit

At start-up, the IC gets its power directly from the high-voltage bulk, through a high-voltage resistor RSTART. The selection of the start-up resistor is the trade-off between power loss and start-up time. The current flowing through RSTART at the minimum input voltage must be higher than the VCC current under UVLO conditions (1 mA at its maximum value). A resistance of 100-kΩ was chosen for RSTART, providing 1 mA of start-up current at low-line conditions. The start-up resistor is physically comprised of two 50-kΩ resistors in series to meet the high voltage requirements and power rating at high-line.

After VCC is charged up above the UVLO-on threshold, the UC2842 starts to consume full operating current. The VCC capacitor is required to provide enough energy to prevent its voltage from dropping below the UVLO-off threshold during start-up, before the output is able to reach its regulated level. A large bulk capacitance would hold more energy but would result in slower start-up time. In this design, a 120-µF capacitor is chosen to provide enough energy and maintain a start-up time of approximately 2 seconds.