SLUS224F September   1994  – October 2017 UC1842A , UC1843A , UC1844A , UC1845A , UC2842A , UC2843A , UC2844A , UC2845A , UC3842A , UC3843A , UC3844A , UC3845A

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Pulse-by-Pulse Current Limiting
      2. 7.3.2 Current Sense Circuit
      3. 7.3.3 Error Amplifier Configuration
      4. 7.3.4 Undervoltage Lockout
      5. 7.3.5 Oscillator
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Undervoltage Lockout (UVLO) Start-Up
      3. 7.4.3 UVLO Turnoff Mode
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 UC2842A Design Procedure
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Custom Design With WEBENCH® Tools
      2. 11.1.2 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Related Links
    4. 11.4 Receiving Notification of Documentation Updates
    5. 11.5 Community Resources
    6. 11.6 Trademarks
    7. 11.7 Electrostatic Discharge Caution
    8. 11.8 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Detailed Description

Overview

The UCx84xA family of fixed-frequency pulse-width-modulator (PWM) controllers are designed to operate at switching frequencies of 500 kHz. These controllers are designed for peak current mode (PCM) and can be used in isolated and non-isolated power supply designs. These controllers can drive FETs directly from the output, which is capable of sourcing and sinking up to 1 A of gate driver current. These devices also have a built-in low-impedance amplifier that can be used in non-isolated designs to control the power supply output voltage and feedback loop.

Functional Block Diagram

UC1842A UC1843A UC1844A UC1845A UC2842A UC2843A UC2844A UC2845A UC3842A UC3843A UC3844A UC3845A fbd_slus224.gif

Feature Description

Pulse-by-Pulse Current Limiting

Pulse-by-pulse limiting is inherent in the current mode control scheme. An upper limit on the peak current can be established by simply clamping the error voltage. Accurate current limiting allows optimization of magnetic and power semiconductor elements while ensuring reliable supply operation.

Current Sense Circuit

Peak current (IS) is determined by Equation 1:

Equation 1. UC1842A UC1843A UC1844A UC1845A UC2842A UC2843A UC2844A UC2845A UC3842A UC3843A UC3844A UC3845A eq_is.gif

A small RC filter may be required to suppress switch transients.

UC1842A UC1843A UC1844A UC1845A UC2842A UC2843A UC2844A UC2845A UC3842A UC3843A UC3844A UC3845A current_sense_circ.gif Figure 3. Current Sense Circuit Diagram

Error Amplifier Configuration

The error amplifier can source up to 0.8 mA, and sink up to 6 mA.

UC1842A UC1843A UC1844A UC1845A UC2842A UC2843A UC2844A UC2845A UC3842A UC3843A UC3844A UC3845A error_amp_cfg.gif Figure 4. Error Amplifier Configuration Diagram

Undervoltage Lockout

The UCx84xA devices feature undervoltage lockout protection circuits for controlled operation during power-up and power-down sequences. Undervoltage lockout thresholds for the UCx842A, UCx843A, UCx844A, and UCx845A devices are optimized for two groups of applications: off-line power supplies and DC-DC converters. With a wider VCCON to VCCOFF range, the UCx842A and UCx844A devices are ideally suited to off-line AC input applications. The UCx843A and UCx845A controllers have a much narrower VCCON to VCCOFF hysteresis and may be used in DC to DC applications where the input is considered regulated.

During UVLO the IC draws typically 0.3 mA of supply current. This VCC current is considerable less than the UCx84x family and results in lower power drawn from the line. The reduced start-up current is of particular concern in off-line supplies where the IC is powered-up from the high-voltage DC rail, then bootstrapped to an auxiliary winding on the main transformer. Power is then dissipated in the start-up resistor which is sized by the IC’s start-up current. Lowering this by 50% in the UCx84xA version family, as compared to the UCx84x family, reduces the resistors power loss by the same percentage. Once crossing the turnon threshold the IC supply current increases typically to about 11 mA, During undervoltage lockout, the UCx84xA series of devices prevent the power MOSFET from parasitically turning on due to the Miller effect at power-up. This improved design to the lower totem-pole transistor’s operation during undervoltage lockout allows the IC to sink higher currents, up to 10 mA, at saturation voltages as low as 0.7 V, compared to the UCx84x devices which would only sink up to 0.2 mA under the same conditions.

UC1842A UC1843A UC1844A UC1845A UC2842A UC2843A UC2844A UC2845A UC3842A UC3843A UC3844A UC3845A undervoltage_lockout.gif Figure 5. Undervoltage Lockout

Oscillator

UC1842A UC1843A UC1844A UC1845A UC2842A UC2843A UC2844A UC2845A UC3842A UC3843A UC3844A UC3845A g_oscfreq_vs_rt.gif Figure 6. Oscillator Frequency vs Timing Resistance
UC1842A UC1843A UC1844A UC1845A UC2842A UC2843A UC2844A UC2845A UC3842A UC3843A UC3844A UC3845A g_maxduty_vs_rt.gif Figure 7. Maximum Duty Cycle vs Timing Resistance
UC1842A UC1843A UC1844A UC1845A UC2842A UC2843A UC2844A UC2845A UC3842A UC3843A UC3844A UC3845A oscillator_section.gif Figure 8. Oscillator Section
UC1842A UC1843A UC1844A UC1845A UC2842A UC2843A UC2844A UC2845A UC3842A UC3843A UC3844A UC3845A slope_comp.gif Figure 9. Slope Compensation

Precision operation at high frequencies with an accurate maximum duty cycle, see Figure 7, can now be obtained with the UCx84xA family of devices due to its trimmed oscillator discharge current. This nullifies the effects of production variations in the initial discharge current or dead time. Previous versions of the UCx84x devices had greater than a 2:1 oscillator discharge current range and resulted in less reliable maximum duty cycle programming.

A fraction of the oscillator ramp can be resistively summed with the current sense signal, to provide slope compensation for converters requiring duty cycles over 50%. Capacitor C forms a filter with R2 to suppress the leading-edge switch spikes.

Device Functional Modes

Normal Operation

The IC can be used in peak current mode (PCM) control or voltage mode (VM) control. When the converter is operating in PCM, the voltage amplifier output will regulate the converter's peak current and duty cycle. When the IC is used in VM control, the voltage amplifier output will regulate the power converter's duty cycle. The regulation of the system's peak current and duty cycle can be achieved with the use of the integrated error amplifier and external feedback circuitry.

Undervoltage Lockout (UVLO) Start-Up

During system start-up, VCC voltage starts to rise from 0. Before the VCC voltage reaches its corresponding start threshold, the IC is operating in UVLO mode. After the UVLO turn start-up threshold is met the device will become active and the reference will come up to 5 V.

UVLO Turnoff Mode

If the bias voltage to VCC drops below the UVLO minimum operating voltage, PWM switching stops and the reference will become inactive, returning to 0 V. The device can be restarted by applying a voltage greater than the UVLO start threshold to the VCC pin.