Current loops must be kept as short and narrow as possible.
The IC ground and power ground must meet at the return for the input bulk capacitor. Ensure that high frequency and high current from the power stage does not go through the signal ground paths.
A high-frequency bypass capacitor (CVCC1) must be placed across VCC and GND pins as close as possible to the pins.
Resistor RS2 and capacitor CF form a low-pass filter for the current sense signal. CF must be as close to CS and GND pins as possible.
Capacitor CVREF must be as close to VREF and GND pins as possible.
Figure 15 shows the SMD components arranged for wave-solder on a single-layer board. If multiple layers are used, some components may be rearranged for easier interconnection and reduced current-loop areas. If the solder process allows, placing the SMD components in perpendicular orientations may improve interconnections and loop areas.