SLUSDV7B October   2019  – March 2021 UCC23313-Q1


  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Function
    1.     Pin Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics
    10. 6.10 Switching Characteristics
    11. 6.11 Insulation Characteristics Curves
    12. 6.12 Typical Characteristics
  7. Parameter Measurement Information
    1. 7.1 Propagation Delay, rise time and fall time
    2. 7.2 IOH and IOL testing
    3. 7.3 CMTI Testing
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Power Supply
      2. 8.3.2 Input Stage
      3. 8.3.3 Output Stage
      4. 8.3.4 Protection Features
        1. Undervoltage Lockout (UVLO)
        2. Active Pulldown
        3. Short-Circuit Clamping
    4. 8.4 Device Functional Modes
      1. 8.4.1 ESD Structure
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. Selecting the Input Resistor
        2. Gate Driver Output Resistor
        3. Estimate Gate-Driver Power Loss
        4. Estimating Junction Temperature
        5. Selecting VCC Capacitor
      3. 9.2.3 Application Performance Plots
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 PCB Material
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DWY|6
Thermal pad, mechanical data (Package|Pins)
Orderable Information


UCC23313-Q1 is a single channel isolated gate driver, with an opto-compatible input stage, that can drive IGBTs, MOSFETs and SiC FETs. It has 4A peak output current capability with max output driver supply voltage of 33V. The inputs and the outputs are galvanically isolated. UCC23313-Q1 is offered in an industry standard 6 pin (SO6) package with >8.5mm creepage and clearance. It has a working voltage of 700-VRMS, isolation rating of 3.75 kVRMS for 60s and a surge rating of 6 kVPK. It is pin-to-pin compatible with standard opto isolated gate drivers. While standard opto isolated gate drivers use an LED as the input stage, UCC23313-Q1 uses an emulated diode (or "e-diode") as the input stage which does not use light emission to transmit signals across the isolation barrier. The input stage is isolated from the driver stage by dual, series HV SiO2 capacitors in full differential configuration that not only provides isolation but also offers best-in-class common mode transient immunity of >150kV/us. The e-diode input stage along with capacitive isolation technology gives UCC23313-Q1 several performance advantages over standard opto isolated gate drivers. They are as follows:

  1. Since the e-diode does not use light emission for its operation, the reliability and aging characteristics of UCC23313-Q1 are naturally superior to those of standard opto isolated gate drivers.
  2. Higher ambient operating temperature range of 125°C, compared to only 105°C for most opto isolated gate drivers
  3. The e-diode forward voltage drop has less part-to-part variation and smaller variation across temperature. Hence, the operating point of the input stage is more stable and predictable across different parts and operating temperature.
  4. Higher common mode transient immunity than opto isolated gate drivers
  5. Smaller propagation delay than opto isolated gate drivers
  6. Due to superior process controls achievable in capacitive isolation compared to opto isolation, there is less part-to-part skew in the prop delay, making the system design simpler and more robust
  7. Smaller pulse width distortion than opto isolated gate drivers

The signal across the isolation has an on-off keying (OOK) modulation scheme to transmit the digital data across a silicon dioxide based isolation barrier (see Figure 8-1). The transmitter sends a high-frequency carrier across the barrier to represent one digital state and sends no signal to represent the other digital state. The receiver demodulates the signal after advanced signal conditioning and produces the output through a buffer stage. The UCC23313-Q1 also incorporates advanced circuit techniques to maximize the CMTI performance and minimize the radiated emissions from the high frequency carrier and IO buffer switching. Figure 8-2 shows conceptual detail of how the OOK scheme works.