SLUSD90E June   2019  – February 2021 UCC256402 , UCC256403 , UCC256404


  1. Features
  2. Applications
  3. Description
  4. Revision History
    1.     Device Comparison Table
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Hybrid Hysteretic Control
      2. 7.3.2 Regulated 13-V Supply
      3. 7.3.3 Feedback Chain
        1. Optocoupler Feedback Signal Input and Bias
        2. FB Pin Voltage Clamp
        3. "Pick Lower Value" Block and Soft Start Multiplexer
        4. Pick Higher Block and Burst Mode Multiplexer
        5. VCR Comparators
      4. 7.3.4 Resonant Capacitor Voltage Sensing
      5. 7.3.5 Resonant Current Sensing
      6. 7.3.6 Bulk Voltage Sensing
      7. 7.3.7 Output Voltage Sensing
      8. 7.3.8 High Voltage Gate Driver
        1. Adaptive Dead Time Control
      9. 7.3.9 Protections
        1. ZCS Region Prevention
        2. Over Current Protection (OCP)
        3. Bias Winding Over Voltage Protection (BWOVP)
        4. Input Under Voltage Protection (VINUVP)
        5. Input Over Voltage Protection (VINOVP)
        6. Boot UVLO
        7. RVCC UVLO
        8. Over Temperature Protection (OTP)
    4. 7.4 Device Functional Modes
      1. 7.4.1 High Voltage Start-Up
      2. 7.4.2 X-Capacitor Discharge
      3. 7.4.3 Burst Mode Control
        1. Soft-Start and Burst-Mode Threshold
        2. BMTL/BMTH Ratio Programming
      4. 7.4.4 System State Machine
  8. Power Supply Recommendations
    1. 8.1 VCC Pin Capacitor
    2. 8.2 Boot Capacitor
    3. 8.3 RVCC Pin Capacitor
  9. Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Related Links
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Community Resources
    5. 10.5 Trademarks

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Layout Guidelines

  • Put a 2.2-µF ceramic capacitor on VCC pin in addition to the energy storage electrolytic capacitor. The 2.2-µF ceramic capacitor should be put as close as possible to the VCC pin.
  • RVCC pin should have a bypass capacitor of 4.7 µF or more. It is recommended to add a 0.1-µF ceramic capacitor in addition to the 4.7 µF. The capacitors should be put as close as possible to the RVCC pin. RVCC cap is recommended to be size at least 5 times of boot capacitor.
  • Minimum recommended boot capacitor, CBOOT, is 0.1 µF. The minimum value of the boot capacitor needs to be determined by the minimum burst frequency. The boot capacitor should be large enough to hold the bootstrap voltage during the lowest burst frequency. Please refer to the boot leakage current in the electrical table.
  • Signal ground and power ground should be single-point connected. Power ground is recommended to connect to the negative terminal of the LLC input bulk capacitor.
  • The filtering capacitors for ISNS and BLK should be put as close as possible to the pins.
  • The bottom capacitor on VCR should be put as close as possible to the VCR pin.
  • FB trace should be as short as possible
  • Soft-start capacitor should be put as close as possible to LL/SS pin
  • Use film capacitors or C0G, NP0 ceramic capacitors for the VCR divider and ISNS capacitor for low distortion
  • Add necessary filtering capacitors on the BW pin to filter out the high spikes on the bias winding waveform. It is critical to filter out the high spikes because internally the signal is peak detected and then sampled at the low-side turn off edge.
  • Keep necessary high voltage clearance and creepage.
  • If 2 kV HBM ESD rating is needed on HV pin, it is acceptable to place a 100 pF capacitor from the HV pin to ground in order to pass up to 2 kV HBM ESD.