SLUSD90C June   2019  – March 2020 UCC256402 , UCC256403 , UCC256404


  1. Features
  2. Applications
  3. Description
    1.     Simplified Schematic
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Hybrid Hysteretic Control
      2. 8.3.2 Regulated 13-V Supply
      3. 8.3.3 Feedback Chain
        1. Optocoupler Feedback Signal Input and Bias
        2. FB Pin Voltage Clamp
        3. "Pick Lower Value" Block and Soft Start Multiplexer
        4. Pick Higher Block and Burst Mode Multiplexer
        5. VCR Comparators
      4. 8.3.4 Resonant Capacitor Voltage Sensing
      5. 8.3.5 Resonant Current Sensing
      6. 8.3.6 Bulk Voltage Sensing
      7. 8.3.7 Output Voltage Sensing
      8. 8.3.8 High Voltage Gate Driver
        1. Adaptive Dead Time Control
      9. 8.3.9 Protections
        1. ZCS Region Prevention
        2. Over Current Protection (OCP)
        3. Bias Winding Over Voltage Protection (BWOVP)
        4. Input Under Voltage Protection (VINUVP)
        5. Input Over Voltage Protection (VINOVP)
        6. Boot UVLO
        7. RVCC UVLO
        8. Over Temperature Protection (OTP)
    4. 8.4 Device Functional Modes
      1. 8.4.1 High Voltage Start-Up
      2. 8.4.2 X-Capacitor Discharge
      3. 8.4.3 Burst Mode Control
        1. Soft-Start and Burst-Mode Threshold
        2. BMTL/BMTH Ratio Programming
      4. 8.4.4 System State Machine
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1.  LLC Power Stage Requirements
        2.  LLC Gain Range
        3.  Select Ln and Qe
        4.  Determine Equivalent Load Resistance
        5.  Determine Component Parameters for LLC Resonant Circuit
        6.  LLC Primary-Side Currents
        7.  LLC Secondary-Side Currents
        8.  LLC Transformer
        9.  LLC Resonant Inductor
        10. LLC Resonant Capacitor
        11. LLC Primary-Side MOSFETs
        12. LLC Rectifier Diodes
        13. LLC Output Capacitors
        14. HV Pin Series Resistors
        15. BLK Pin Voltage Divider
        16. ISNS Pin Differentiator
        17. VCR Pin Capacitor Divider
        18. BW Pin Voltage Divider
        19. Soft Start and Burst Mode Programming
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 VCC Pin Capacitor
    2. 10.2 Boot Capacitor
    3. 10.3 RVCC Pin Capacitor
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Soft Start and Burst Mode Programming

The LL/SS and BW pins allow the designer to select a burst mode threshold as well as program hysteresis for entering and exiting burst mode. The resistor divider of connected to the LL/SS pin sets the BMTH threshold while the BW pin sets the ratio between BMTL and BMTH. In addition to programming the burst mode threshold, the LL/SS pin provides the capability to program an initial voltage onto the LL/SS pin in order to limit the maximum switching frequency during startup. For initial selection of LL/SS components, it is recommended to select an initial LL/SS pin voltage between 0 V and 1 V and to select burst mode threshold between 1 V and 2 V. The LL/SS pin parameters can be fine tuned later based on bench measurement.

In this design, an initial LL/SS pin voltage of 0.3 V and a BMTH threshold of 0.6 V are selected. The soft start capacitor sets how quickly the voltage on the soft start capacitor rises. The soft start time varies with load condition. At full load or over load condition, the soft start time is the longest. It is not easy to calculate the exact soft start time value. However, it can be estimated that under full load condition, the longest possible soft start time is determined by how quickly the soft start pin voltage rises to the maximum VCR peak to peak voltage. For a start up time of 7.5 ms, the soft start capacitor is sized to be the following:

Equation 69. UCC256402 UCC256403 UCC256404 qu72_slusd90.gif

A standard value of 68nF is selected for the soft start capacitor. In order to properly select the resistors on LL/SS, first define RTH as the equivalent resistance on the LL/SS pin and VTH as the equivalent voltage source on the LL/SS pin.

Equation 70. UCC256402 UCC256403 UCC256404 qu73_slusd90.gif
Equation 71. UCC256402 UCC256403 UCC256404 qu74_slusd90.gif

During the SS pull low phase, the voltage on the LL/SS pin is internally pulled down through a 1.2 kΩ resistor. During the SS initial program phase, the internal pulldown is released and the soft start capacitor is allowed to naturally charge up from RVCC. The total voltage offset on the LL/SS soft start capacitor can be calculated using the equation below.

Equation 72. UCC256402 UCC256403 UCC256404 qu75_slusd90.gif

Substituting for RVCC/RLL/SS_Upper and using a linear approximation for the exponential term, the equation can be simplified to the following.

Equation 73. UCC256402 UCC256403 UCC256404 qu76_slusd90.gif

The current used by the LL/SS pin to program BMTH, IBMT, has the following relationships. IBMT can be directly solved for based on the desired BMTH threshold.

Equation 74. UCC256402 UCC256403 UCC256404 qu77_slusd90.gif
Equation 75. UCC256402 UCC256403 UCC256404 qu78_slusd90.gif

Rearranging Equation 73, VTH and RTH can now be calculated.

Equation 76. UCC256402 UCC256403 UCC256404 qu79_slusd90_corrected.gif
Equation 77. UCC256402 UCC256403 UCC256404 qu81_slusd90.gif

Values for RLL/SS_Upper and RLL/SS_Lower can be determined from VTH and RTH

Equation 78. UCC256402 UCC256403 UCC256404 qu82_slusd90.gif

A standard value of 549 kΩ is selected for RLL/SS_Upper.

Equation 79. UCC256402 UCC256403 UCC256404 qu83_slusd90.gif

A standard value of 316 kΩ is selected for RLL/SS_Lower.