SLUS822C June   2008  – August 2016 UCC27200-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input Stages
        1. 7.3.1.1 Undervoltage Lockout (UVLO)
        2. 7.3.1.2 Level Shift
        3. 7.3.1.3 Boot Diode
        4. 7.3.1.4 Output Stages
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Switching the MOSFETs
      2. 8.1.2 Dynamic Switching of the MOSFETs
      3. 8.1.3 Delay Matching and Narrow Pulse Widths
      4. 8.1.4 Boot-Diode Performance
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input Threshold Type
        2. 8.2.2.2 VDD Bias Supply Voltage
        3. 8.2.2.3 Peak Source and Sink Currents
        4. 8.2.2.4 Propagation Delay
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Power Dissipation
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Related Links
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resource
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

DDA Package
8-Pin SO With PowerPAD
Top View
The VSS pin and the exposed thermal die pad are internally connected.

Pin Functions

PIN TYPE(1) DESCRIPTION
NO. NAME
1 VDD P Positive supply to the lower gate driver. Decouple this pin to VSS (GND). Typical decoupling capacitor range is 0.22 μF to 1 μF.
2 HB I High-side bootstrap supply. The bootstrap diode is on-chip, but the external bootstrap capacitor is required. Connect positive side of the bootstrap capacitor to this pin. Typical range of HB bypass capacitor is 0.022 μF to 0.1 μF, however, the value is dependant on the gate charge of the high-side MOSFET.
3 HO O High-side output. Connect to the gate of the high-side power MOSFET.
4 HS I High-side source connection. Connect to source of high-side power MOSFET. Connect negative side of bootstrap capacitor to this pin.
5 HI I High-side input
6 LI I Low-side input
7 VSS O Negative supply terminal for the device which is generally grounded
8 LO — Low-side output. Connect to the gate of the low-side power MOSFET.
PowerPAD PowerPAD — Electrically referenced to VSS (GND). Connect to a large thermal mass trace or GND plane to dramatically improve thermal performance.
(1) I = Input, O = Output, P = Power