SLUSC72B May   2015  – March 2016 UCC27201A-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input Stages
        1. 7.3.1.1 UVLO (Under Voltage Lockout)
        2. 7.3.1.2 Level Shift
        3. 7.3.1.3 Boot Diode
        4. 7.3.1.4 Output Stages
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Switching the MOSFETs
        2. 8.2.2.2 Dynamic Switching of the MOSFETs
        3. 8.2.2.3 Delay Matching and Narrow Pulse Widths
        4. 8.2.2.4 Boot Diode Performance
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted). All voltages are with respect to VSS (4)
PARAMETER MIN MAX UNIT
VDD Supply voltage range(1) –0.3 20 V
VHI, VLI Input voltages on LI and HI –0.3 20 V
VLO Output voltage on LO DC –0.3 VDD + 0.3 V
Repetitive pulse <100 ns(2) –2 VDD + 0.3 V
VHO Output voltage on HO DC VHS – 0.3 VHB + 0.3 V
Repetitive pulse <100 ns(2) VHS – 2 VHB + 0.3,
(VHB - VHS < 20)		 V
VHS Voltage on HS DC –1 120 V
Repetitive pulse <100 ns(2) –18 120 V
VHB Voltage on HB –0.3 120 V
Voltage on HB-HS –0.3 20 V
Power dissipation at TA = 25°C (DDA package) (3) 2.7 W
Power dissipation at TA = 25°C (DMK package) (3) 2.6 W
Lead temperature (soldering, 10 sec.) 300 °C
TJ Operating virtual junction temperature –40 150 °C
Tstg Storage temperature –65 150 °C
(1) All voltages are with respect to Vss. Currents are positive into, negative out of the specified terminal.
(2) Values are verified by characterization and are not production tested.
(3) This data was taken using the JEDEC proposed high-K test PCB. See Thermal Information for details.
(4) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1) ±1000 V
Charged-device model (CDM), per AEC Q100-011 ±1500 V
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
PARAMETER MIN NOM MAX UNIT
VDD Supply voltage range 8 12 17 V
VHS Voltage on HS –1 105 V
Voltage on HS, (repetitive pulse <100 ns) –15 110 V
VHB Voltage on HB VHS + 8, VDD –1 VHS + 17, 115 V
Vsr Voltage slew rate on HS 50 V / ns
TJ Operating junction temperature range –40 140 °C

6.4 Thermal Information

THERMAL METRIC DDA
(SOIC-8)		 DMK
(VSON)		 UNITS
8 PINS 10 PINS
θJA Junction-to-ambient thermal resistance 40.5 41.7 °C/W
θJCtop Junction-to-case (top) thermal resistance 49.0 48.2 °C/W
θJB Junction-to-board thermal resistance 10.2 18.3 °C/W
ψJT Junction-to-top characterization parameter 3.1 0.7 °C/W
ψJB Junction-to-board characterization parameter 9.7 18.4 °C/W
θJCbot Junction-to-case (bottom) thermal resistance 1.5 3.7 °C/W

6.5 Electrical Characteristics

over operating free-air temperature range, VDD = VHB = 12 V, VHS = VSS = 0 V, No load on LO or HO, TA = TJ = -40°C to +140°C, (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY CURRENTS
IDD VDD quiescent current VLI = VHI = 0 0.4 0.8 mA
IDDO VDD operating current f = 500 kHz, CLOAD = 0 3.8 5.5 mA
IHB Boot voltage quiescent current VLI = VHI = 0 V 0.4 0.8 mA
IHBO Boot voltage operating current f = 500 kHz, CLOAD = 0 2.5 4 mA
IHBS HB to VSS quiescent current VHS = VHB = 110 V 0.0005 1 uA
IHBSO HB to VSS operating current f = 500 kHz, CLOAD = 0 0.1 mA
INPUT
VHIT Input voltage threshold 1.7 2.5
VLIT Input voltage threshold 0.8 1.6
VIHYS Input voltage Hysteresis 100 mV
RIN Input pulldown resistance 100 200 350 kΩ
UNDERVOLTAGE PROTECTION (UVLO)
VDD rising threshold 6.2 7.1 7.8 V
VDD threshold hysteresis 0.5 V
VHB rising threshold 5.8 6.7 7.2 V
VHB threshold hysteresis 0.4 V
BOOTSTRAP DIODE
VF Low-current forward voltage I VDD – HB = 100 μA 0.65 0.85 V
VFI High-current forward voltage I VDD – HB = 100 mA 0.85 1.1 V
RD Dynamic resistance, ΔVF/ΔI I VDD – HB = 100 mA and 80 mA 0.6 1.0 Ω
LO GATE DRIVER
VLOL Low level output voltage ILO = 100 mA 0.18 0.4 V
VLOH High level output voltage TJ = –40 to +125°C ILO = –100 mA, VLOH = VDD - VLO 0.25 0.4 V
TJ = –40 to +140°C ILO = –100 mA, VLOH = VDD - VLO 0.25 0.42 V
Peak pull-up current VLO = 0 V 3 A
Peak pull-down current VLO = 12 V 3 A
HO GATE DRIVER
VHOL Low level output voltage IHO = 100 mA 0.18 0.4 V
VHOH High level output voltage TJ = –40 to +125°C IHO = –100 mA, VHOH = VHB- VHO 0.25 0.4 V
TJ = –40 to +140°C IHO = –100 mA, VHOH = VHB- VHO 0.25 0.42 V
Peak pull-up current VHO = 0 V 3 A
Peak pull-down current VHO = 12 V 3 A

6.6 Switching Characteristics

PARAMETER TEST CONDITIONS MIN NOM MAX UNIT
PROPAGATION DELAYS
tDLFF VLI falling to VLO falling TJ = –40 to +125°C CLOAD = 0 20 45 ns
TJ = –40 to +140°C CLOAD = 0 20 50 ns
tDHFF VHI falling to VHO falling TJ = -40 to +125°C CLOAD = 0 20 45 ns
TJ = –40 to +140°C CLOAD = 0 20 50 ns
tDLRR VLI rising to VLO rising TJ = –40 to +125°C CLOAD = 0 20 45 ns
TJ = –40 to +140°C CLOAD = 0 20 50 ns
tDHRR VHI rising to VHO rising TJ = –40 to +125°C CLOAD = 0 20 45 ns
TJ = –40 to +140°C CLOAD = 0 20 50 ns
DELAY MATCHING
tMON LI ON, HI OFF 1 7 ns
tMOFF LI OFF, HI ON 1 7 ns
OUTPUT RISE AND FALL TIME
tR LO, HO CLOAD = 1000 pF 8 ns
tF LO, HO CLOAD = 1000 pF 7 ns
tR LO, HO (3 V to 9 V) CLOAD = 0.1 μF 0.35 0.6 µs
tF LO, HO (3 V to 9 V) CLOAD = 0.1 μF 0.3 0.6 µs
MISCELLANEOUS
Minimum input pulse width that changes the output 50 ns
Bootstrap diode turn-off time IF = 20 mA, IREV = 0.5 A(1) (2) 20 ns
(1) Typical values for TA = 25°C.
(2) IF: Forward current applied to bootstrap diode, IREV: Reverse current applied to bootstrap diode.
UCC27201A-Q1 fig22_lus746.gif Figure 1. Timing Requirements

6.7 Typical Characteristics

UCC27201A-Q1 wav2_slusc72.gif
VDD = 12 V
No Load on Outputs
Figure 2. IDD Operating Current vs Frequency
UCC27201A-Q1 wav4_slusc72.gif
HB = 12 V
No Load on Outputs
Figure 4. HB TO VSS Operating Current
vs Frequency
UCC27201A-Q1 wav8_slusc72.gif
VDD = 12 V
Figure 6. Input Threshold vs Temperature
UCC27201A-Q1 wav9_slusc72.gif
ILO = IHO = –100 mA
Figure 8. LO and HO High Level Output Voltage
vs Temperature
UCC27201A-Q1 wav12_lus746.gif
Figure 10. Undervoltage Lockout Threshold Hysteresis
vs Temperature
UCC27201A-Q1 wav16_slusc72.gif
T = 25°C
Figure 12. Propagation Delay vs Supply Voltage
UCC27201A-Q1 wav18_slusc72.gif
VDD = VHB = 12 V
Figure 14. Output Current vs Output Voltage
UCC27201A-Q1 wav20_slusc72.gif
Inputs Low
T = 25°C
Figure 16. Quiescent Current vs Supply Voltage
UCC27201A-Q1 wav3_slusc72.gif
HB = 12 V
No Load on Outputs
Figure 3. Boot Voltage Operating Current
vs Frequency
UCC27201A-Q1 wav6_slusc72.gif
T = 25°C
Figure 5. Input Threshold vs Supply Voltage
UCC27201A-Q1 wav10_slusc72.gif
ILO = IHO = 100 mA
Figure 7. LO and HO Low Level Output Voltage
vs Temperature
UCC27201A-Q1 wav11_lus746.gif
Figure 9. Undervoltage Lockout Threshold
vs Temperature
UCC27201A-Q1 wav14_slusc72.gif
VDD = VHB = 12 V
Figure 11. Propagation Delays vs Temperature
UCC27201A-Q1 wav17_slusc72.gif
VDD = VHB = 12 V
Figure 13. Delay Matching vs Temperature
UCC27201A-Q1 wav19_lus746.gif
Figure 15. Diode Current vs Diode Voltage