SLUSAQ3G November   2011  – April 2015 UCC27523 , UCC27524 , UCC27525 , UCC27526

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 VDD and Undervoltage Lockout
      2. 8.3.2 Operating Supply Current
      3. 8.3.3 Input Stage
      4. 8.3.4 Enable Function
      5. 8.3.5 Output Stage
      6. 8.3.6 Low Propagation Delays and Tightly Matched Outputs
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Input-to-Output Logic
        2. 9.2.2.2 Enable and Disable Function
        3. 9.2.2.3 VDD Bias Supply Voltage
        4. 9.2.2.4 Propagation Delay
        5. 9.2.2.5 Drive Current and Power Dissipation
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
  12. 12Device and Documentation Support
    1. 12.1 Related Links
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7 Specifications

7.1 Absolute Maximum Ratings(1)(2)

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
Supply voltage VDD –0.3 20 V
OUTA, OUTB voltage DC –0.3 VDD + 0.3
Repetitive pulse < 200 ns(4) –2 VDD + 0.3
Output continuous source/sink current IOUT_DC 0.3 A
Output pulsed source/sink current (0.5 µs) IOUT_pulsed 5
INA, INB, INA+, INA–, INB+, INB–, ENA, ENB voltage(3) –0.3 20 V
Operating virtual junction temperature, TJ –40 150 °C
Lead temperature Soldering, 10 s 300
Reflow 260
Storage temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to GND unless otherwise noted. Currents are positive into, negative out of the specified terminal. See Mechanical, Packaging, and Orderable Information for thermal limitations and considerations of packages.
(3) The maximum voltage on the Input and Enable pins is not restricted by the voltage on the VDD pin.
(4) Values are verified by characterization on bench.

7.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±4000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
Supply voltage, VDD 4.5 12 18 V
Operating junction temperature –40 140 °C
Input voltage, INA, INB, INA+, INA–, INB+, INB– 0 18 V
Enable voltage, ENA and ENB 0 18

7.4 Thermal Information

THERMAL METRIC(1) UCC27523/4/5 UCC27524 UCC27523/4/5/6 UNIT
SOIC (D) MSOP (DGN) PDIP (P) WSON (DSD)
8 PINS 8 PINS 8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 130.9 71.8 62.1 46.7 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 80 65.6 52.7 46.7
RθJB Junction-to-board thermal resistance 71.4 7.4 39.1 22.4
ψJT Junction-to-top characterization parameter 21.9 7.4 31 0.7
ψJB Junction-to-board characterization parameter 70.9 31.5 39.1 22.6
RθJC(bot) Junction-to-case (bottom) thermal resistance – 19.6 – 9.5
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

7.5 Electrical Characteristics

VDD = 12 V, TA = TJ = –40°C to 140°C, 1-µF capacitor from VDD to GND. Currents are positive into, negative out of the specified terminal (unless otherwise noted,)
PARAMETER TEST CONDITION MIN TYP MAX UNIT
BIAS CURRENTS
IDD(off) Start-up current,
(based on UCC27524 Input configuration)		 VDD = 3.4 V,
INA = VDD,
INB = VDD		 55 110 175 μA
VDD = 3.4 V,
INA = GND,
INB = GND		 25 75 145
UNDERVOLTAGE LOCKOUT (UVLO)
VON Supply start threshold TJ = 25°C 3.91 4.2 4.5 V
TJ = –40°C to 140°C 3.7 4.2 4.65
VOFF Minimum operating voltage after supply start 3.4 3.9 4.4
VDD_H Supply voltage hysteresis 0.2 0.3 0.5
INPUTS (INA, INB, INA+, INA–, INB+, INB–), UCC2752X (D, DGN, DSD)
VIN_H Input signal high threshold Output high for non-inverting input pins
Output low for inverting input pins		 1.9 2.1 2.3 V
VIN_L Input signal low threshold Output low for non-inverting input pins
Output high for inverting input pins		 1 1.2 1.4
VIN_HYS Input hysteresis 0.7 0.9 1.1
INPUTS (INA, INB, INA+, INA–, INB+, INB–) UCC27524P ONLY
VIN_H Input signal high threshold Output high for non-inverting input pins
Output low for inverting input pins 		2.3 V
VIN_L Input signal low threshold Output low for non-inverting input pins
Output high for inverting input pins 		1
VIN_HYS Input hysteresis 0.9
ENABLE (ENA, ENB) UCC2752X (D, DGN, DSD)
VEN_H Enable signal high threshold Output enabled 1.9 2.1 2.3 V
VEN_L Enable signal low threshold Output disabled 0.95 1.15 1.35
VEN_HYS Enable hysteresis 0.7 0.95 1.1
ENABLE (ENA, ENB) UCC27524P ONLY
VEN_H Enable signal high threshold Output enabled 2.3 V
VEN_L Enable signal low threshold Output disabled 0.95
VEN_HYS Enable hysteresis 0.95
OUTPUTS (OUTA, OUTB)
ISNK/SRC Sink/source peak current(1) CLOAD = 0.22 µF, FSW = 1 kHz ±5 A
VDD-VOH High output voltage IOUT = –10 mA 0.075 V
VOL Low output voltage IOUT = 10 mA 0.01
ROH Output pullup resistance(2) IOUT = –10 mA 2.5 5 7.5 Ω
ROL Output pulldown resistance IOUT = 10 mA 0.15 0.5 1 Ω
(1) Ensured by design.
(2) ROH represents on-resistance of only the P-Channel MOSFET device in pullup structure of UCC2752X output stage.

7.6 Switching Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tR Rise time (1) CLOAD = 1.8 nF 7 18 ns
tF Fall time(1) CLOAD = 1.8 nF 6 10
tM Delay matching between 2 channels INA = INB, OUTA and OUTB at 50% transition point 1 4
tPW Minimum input pulse width that changes the output state 15 25
tD1, tD2 Input to output propagation delay (1) CLOAD = 1.8 nF, 5-V input pulse 6 13 23
tD3, tD4 EN to output propagation delay (1) CLOAD = 1.8 nF, 5-V enable pulse 6 13 23
(1) See timing diagrams in Figure 1, Figure 2, Figure 3, and Figure 4
UCC27523 UCC27524 UCC27525 UCC27526 timing1_lusaq3.gifFigure 1. Enable Function
(For Non-Inverting Input Driver Operation)
UCC27523 UCC27524 UCC27525 UCC27526 timing3_lusaq3.gifFigure 3. Non-Inverting Input Driver Operation
UCC27523 UCC27524 UCC27525 UCC27526 timing2_lusaq3.gifFigure 2. Enable Function
(For Inverting Input Driver Operation)
UCC27523 UCC27524 UCC27525 UCC27526 timing4_lusaq3.gifFigure 4. Inverting Input Driver Operation

7.7 Typical Characteristics

UCC27523 UCC27524 UCC27525 UCC27526 G001_lusaq3_Startup_Current.pngFigure 5. Start-Up Current vs Temperature
UCC27523 UCC27524 UCC27525 UCC27526 G012_lusaq3_Supply_Current.pngFigure 7. Supply Current vs Temperature (Outputs in DC ON/OFF Condition)
UCC27523 UCC27524 UCC27525 UCC27526 G004_lusaq3_InputThreshold.pngFigure 9. Input Threshold vs Temperature
UCC27523 UCC27524 UCC27525 UCC27526 G006_lusaq3_PullUp_Resistance.pngFigure 11. Output Pullup Resistance vs Temperature
UCC27523 UCC27524 UCC27525 UCC27526 G008_lusaq3_Rise_time.pngFigure 13. Rise Time vs Temperature
UCC27523 UCC27524 UCC27525 UCC27526 G010_lusaq3_Input-Ouput_delay.pngFigure 15. Input to Output Propagation Delay vs Temperature
UCC27523 UCC27524 UCC27525 UCC27526 G013_lusaq3_Operating_Supply_Current.pngFigure 17. Operating Supply Current vs Frequency
UCC27523 UCC27524 UCC27525 UCC27526 G015_lusaq3_Rise_Time.pngFigure 19. Rise Time vs Supply Voltage
UCC27523 UCC27524 UCC27525 UCC27526 G017_lusaq3_EnableThreshold_4.5V.pngFigure 21. Enable Threshold vs Temperature
UCC27523 UCC27524 UCC27525 UCC27526 G002_lusaq3_Operating_SupplyCurrent.pngFigure 6. Operating Supply Current vs Temperature (Outputs Switching)
UCC27523 UCC27524 UCC27525 UCC27526 G003_lusaq3_UVLO.pngFigure 8. UVLO Threshold vs Temperature
UCC27523 UCC27524 UCC27525 UCC27526 G005_lusaq3_EnableThreshold.pngFigure 10. Enable Threshold vs Temperature
UCC27523 UCC27524 UCC27525 UCC27526 G007_lusaq3_Pull-down_Resistance.pngFigure 12. Output Pulldown Resistance vs Temperature
UCC27523 UCC27524 UCC27525 UCC27526 G009_lusaq3_Fall_time.pngFigure 14. Fall Time vs Temperature
UCC27523 UCC27524 UCC27525 UCC27526 G011_lusaq3_EN-Ouput_delay.pngFigure 16. EN to Output Propagation Delay vs Temperature
UCC27523 UCC27524 UCC27525 UCC27526 G014_lusaq3_Propagation_Delay.pngFigure 18. Propagation Delays vs Supply Voltage
UCC27523 UCC27524 UCC27525 UCC27526 G016_lusaq3_Fall_Time.pngFigure 20. Fall Time vs Supply Voltage