SLUSD37E October   2017  – November 2019 UCC28056


  1. Features
  2. Applications
  3. Description
    1.     No Load Power
      1.      Device Images
        1.       Simplified Application
  4. Revision History
  5. Device Comparison Tables
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 CrM/DCM Control Principle
      2. 8.3.2 Line Voltage Feed-Forward
        1. Peak Line Voltage Detection
      3. 8.3.3 Valley Switching and CrM/DCM Hysteresis
        1. Valley Delay Adjustment
      4. 8.3.4 Transconductance Amplifier with Transient Speed-up Function
      5. 8.3.5 Faults and Protections
        1. Supply Undervoltage Lockout
        2. Two Level Over-Current Protection
          1. Cycle-by-Cycle Current Limit Ocp1
          2. Ocp2 Gross Over-Current or CCM Protection
        3. Output Over-Voltage Protection
          1. First Level Output Over-Voltage Protection (Ovp1)
          2. Second Level Over-Voltage Protection (Ovp2)
        4. Thermal Shutdown Protection
        5. Line Under-Voltage or Brown-In
      6. 8.3.6 High-Current Driver
    4. 8.4 Controller Functional Modes
      1. 8.4.1 Burst Mode Operation
      2. 8.4.2 Soft Start
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. Custom Design With WEBENCH® Tools
        2. Power Stage Design
          1. Boost Inductor Design
          2. Boost Switch Selection
          3. Boost Diode Selection
          4. Output Capacitor Selection
        3. ZCD/CS Pin
          1. Voltage Spikes on the ZCD/CS pin Waveform
        4. VOSNS Pin
        5. Voltage Loop Compensation
          1. Plant Model
          2. Compensator Design
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 VOSNS Pin
      2. 11.1.2 ZCD/CS Pin
      3. 11.1.3 VCC Pin
      4. 11.1.4 GND Pin
      5. 11.1.5 DRV Pin
      6. 11.1.6 COMP Pin
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Custom Design With WEBENCH® Tools
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

CrM/DCM Control Principle

UCC28056 IndCurCrmDcm.gifFigure 19. PFC Inductor Current Waveform for CrM and DCM Operation

Consider a single switching cycle that occurs at angle (θ) during the Line Cycle. Assuming ideal CrM operation the average inductor current (ILAvS(θ)) that flows during the switching cycle is given by:

Equation 1. UCC28056 eq-01.gif

A fixed circuit has constant inductance (LBST), so if the switch ON duration (TON(θ)) holds constant (TON) , across the Line Cycle, then the average input current remains proportional to the input voltage. In other words, when controlled in this way, the Boost converter behaves as a resistive load (RInEq) connected across the Line.

Equation 2. UCC28056 eq-02.gif

the next step is to consider DCM operation. Equation 3 describes the average inductor current that flows during the switching cycle.

Equation 3. UCC28056 eq-03.gif

To ensure average input current proportional to input voltage it is necessary for the on-time product TON(θ) x δONDCH(θ) is kept constant across the Line Cycle. Equation 4 shows the equivalent input resistance.

Equation 4. UCC28056 eq-04.gif

The minimum effective input resistance (RInEqMin) is needed to draw maximum power (PInMax) from minimum Line voltage (VInMinPkL):

Equation 5. UCC28056 eq-05.gif

Assume that full power operation at minimum Line operation is in CrM mode. Use Equation 6 to calculate the PFC inductor value required to deliver maximum power from minimum Line.

Equation 6. UCC28056 eq-06.gif


  • TONMAX0 is the maximum switch ON time

Input power demand is an expression of the ratio of input power over maximum input power.

Equation 7. UCC28056 eq-07.gif

Equation 8 rearranges Equation 7 to express TON(θ) time as a function of power demand.

Equation 8. UCC28056 eq-08.gif

Equation 8 represents the CrM/DCM TON control principle implemented by UCC28056. This equation is quadratic in nature but UCC28056 employs the value of δONDCH(θ) from previous cycles as the basis for computing TON(θ) for the current cycle. The process is similar to solving an equation numerically by iteration.

A range of operating frequency options are available for CrM/DCM light-load operation. At one extreme, it can operate at high frequency with low current pulses in CrM mode (TDCM = 0). At the other extreme it can operate, in DCM mode, at minimum frequency (TDCM = TDCMMax) with current pulses of maximum amplitude. The controller can select a TDCM value anywhere between these two extremes. Conduction loss normally dominates when operating at minimum operating frequency leading to reduced efficiency. Switching loss normally dominates when operating at maximum operating frequency (CrM) also leading to reduced efficiency. Typically the most efficient operating frequency occurs when the pulse current amplitude is approximately one third of the maximum value.

Equation 9. UCC28056 eq-09.gif
Equation 10. UCC28056 eq-10.gif

The UCC28056 transitions from CrM to DCM operation when the peak inductor current across a Line Cycle drops below ILPkSOpt. While in DCM operation it adjusts the switching frequency to ensure that the peak inductor current across a Line Cycle remains close to ILPkSOpt for all Line and Load conditions. In this way, UCC28056 attempts to maximize efficiency for all loads and for all Line voltages.