SLUSD37E October 2017 – November 2019 UCC28056
PRODUCTION DATA.
The VOSNS pin voltage is applied to the inverting input of an internal trasnconductance error amplifier. A fixed reference voltage (V_{OSReg}) being applied to the non-inverting input. The error amplifier has high gain hence in steady-state, assuming VCOMP < 5-V, average voltage on the VOSNS pin must be approximately equal to the reference voltage (V_{OSReg}). Output voltage regulation set point (V_{OutReg}) is therefore determined by the external resistor divider network connecting the output voltage to the VOSNS pin according to the following expression.
The resistive divider that feeds the VOSNS pin makes a significant contribution to the unloaded input power. Higher resistor values reduce power consumption of the divider.
Regulation accuracy degrades with increased resistor values due to the effect of VOSNS pin bias current (I_{OSBias}).
To ensure that VOSNS pin bias current degrades output voltage regulation by less than 1%, the upper voltage divider resistor value must be constrained as show in Equation 73.
Equation 73 confirms that reduction of the VOSNS divider dissipation to below 4 mW does not negatively affecting the regulation accuracy.
The PFC stage, of this design example, is to be followed by an LLC stage, that is controlled by UCC256301 device. The UCC28056 controller and the UCC256301 device operate together to form a complete off-Line power supply system with excellent light-load efficiency and standby power. To limit no-load input power a single resistor divider feeds both the VOSNS pin (UCC28056) and the BLK pin (UCC256301). A resistor divider with two taps is required because the UCC28056 requires a different divide ratio (K_{OS}) to that required for the UCC256301 device (K_{BLK}). The upper divider resistor (R_{OS1}) is divided into two parts (R_{OS11}, R_{OS12}) to achieve the additional tap.
For this design example select an upper divider resistor made up of three series-connected, 3.24-MΩ, 1206 SMT resistors. This compact and cost-effective design produces a suitable high-voltage resistor. If a single resistor is preferred, use a high voltage type, rated for the maximum voltage that can appear across the output capacitor during a Line surge test.
Solving Equation 74 and Equation 75 simultaneously results in:
These two divider resistor values can be implemented using easily obtainable values as follows:
Actual regulation set point is therefore:
Power dissipated in the VOSNS resistor divider is: