SLUS161F April   1999  – May 2020 UCC2813-0 , UCC2813-1 , UCC2813-2 , UCC2813-3 , UCC2813-4 , UCC2813-5 , UCC3813-0 , UCC3813-1 , UCC3813-2 , UCC3813-3 , UCC3813-4 , UCC3813-5

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Block Diagram
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Detailed Pin Descriptions
        1. 8.3.1.1 COMP
        2. 8.3.1.2 CS
        3. 8.3.1.3 FB
        4. 8.3.1.4 GND
        5. 8.3.1.5 OUT
        6. 8.3.1.6 RC
        7. 8.3.1.7 REF
        8. 8.3.1.8 VCC
      2. 8.3.2  Undervoltage Lockout (UVLO)
      3. 8.3.3  Self-Biasing, Active Low Output
      4. 8.3.4  Reference Voltage
      5. 8.3.5  Oscillator
      6. 8.3.6  Synchronization
      7. 8.3.7  PWM Generator
      8. 8.3.8  Minimum Off-Time Adjustment (Dead-Time Control)
      9. 8.3.9  Leading Edge Blanking
      10. 8.3.10 Minimum Pulse Width
      11. 8.3.11 Current Limiting
      12. 8.3.12 Overcurrent Protection and Full-Cycle Restart
      13. 8.3.13 Soft Start
      14. 8.3.14 Slope Compensation
    4. 8.4 Device Functional Modes
      1. 8.4.1 Normal Operation
      2. 8.4.2 UVLO Mode
      3. 8.4.3 Soft-Start Mode
      4. 8.4.4 Fault Mode
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1  Bulk Capacitor Calculation
        2. 9.2.2.2  Transformer Design
        3. 9.2.2.3  MOSFET and Output Diode Selection
        4. 9.2.2.4  Output Capacitor Calculation
        5. 9.2.2.5  Current Sensing Network
        6. 9.2.2.6  Gate Drive Resistor
        7. 9.2.2.7  REF Bypass Capacitor
        8. 9.2.2.8  RT and CT
        9. 9.2.2.9  Start-Up Circuit
        10. 9.2.2.10 Voltage Feedback Compensation Procedure
          1. 9.2.2.10.1 Power Stage Gain, Zeroes, and Poles
          2. 9.2.2.10.2 Compensating the Loop
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • P|8
  • PW|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Power Supply Recommendations

An internal VCC shunt regulator is incorporated into each member of the UCCx813-x family to limit the supply voltage to approximately 13.5 V. A series resistor from VCC to the input supply source is required with inputs above 12 V to limit the shunt regulator current. A maximum of 10 mA can be shunted to ground by the internal regulator. The internal regulator in conjunction with the device’s low start-up and operating current can greatly simplify powering the device and may eliminate the requirement for a regulated bootstrap auxiliary supply and winding in many applications. The supply voltage is MOSFET gate level compatible and requires no external Zener diode or regulator protection with a current-limited input supply. The UVLO start-up threshold is 1 V below the shunt regulator level on the UCCx813-[2,4] devices to ensure start-up. It is important to bypass the device's supply (VCC) and reference voltage (REF) pins each with a 0.1-µF to 1-µF ceramic capacitor to ground. The capacitors must be placed as close to the actual pin connections as possible for optimal noise filtering. A second, larger filter capacitor may also be required in offline applications to hold the supply voltage (VVCC) above the UVLO turnoff threshold during start-up.

The UVLO start threshold of the UCC2813-[2,4] devices has a range of 11.5 V to 13.5 V, while the protection zener voltage can vary from 12 V to 15 V. However, the absolute maximum supply voltage of the IC is specified at 12 V. This absolute maximum is defined as the lowest possible Zener voltage when driven from a low impedance (voltage) source. The zener voltage is always higher than the UVLO start voltage. These two parameters track each other and the chip is tested to guarantee that the Zener voltage will never be below that of the start voltage. To limit the current flowing in the internal clamp zener, a series resistor must be added. Failure to provide a series resistance between the auxiliary voltage source and the Vcc pin of the controller, to limit the current and voltage stress within rated levels on the Vcc pin may result in permanent damage to the controller. In automotive or industrial applications where there is a risk of high power load transients which may cause transients or voltage excursions on the Vcc rail supplying the PWM controller it is recommended to add an external Zener diode across the Vcc pin. The external Zener acts as an additional protection to the impedance provided by the series resistor between the Vcc source and Vcc pin.

UCC2813-0 UCC2813-1 UCC2813-2 UCC2813-3 UCC2813-4 UCC2813-5 UCC3813-0 UCC3813-1 UCC3813-2 UCC3813-3 UCC3813-4 UCC3813-5 Block-Diagram_mod1.gifFigure 43. Different Ways to Power Up the Device

Placing a resistor, Rg, in series with the gate of the mosfet allows the mosfet switching speed to be adjusted and also can be used to keep the peak gate drive currents within the specified limits of the controller.