A 1-V (typical) cycle-by-cycle current limit threshold is incorporated into the UCCx813-x family. The 100-ns leading-edge-blanking interval is applied to this current-limiting circuitry. The blanking overrides the current-limit comparator output to prevent the leading-edge switch noise from triggering a current-limit function. Propagation delay from the current-limit comparator to the output is typically 70 ns. This high-speed path minimizes power semiconductor dissipation during an overload by abbreviating the ON time.
For increased efficiency in the current-sense circuitry, the circuit shown in Figure 26 can be used. Resistors RA and RB bias the actual current-sense resistor voltage up, allowing a smaller current sense amplitude to be used. This circuitry provides current-limiting protection with lower power-loss current sensing.
The example shown uses a 200-mV full-scale signal at the current sense resistor. Resistor RB biases this up by approximately 700 mV to match the 0.9-V minimum specification of the current-limit comparator of the IC. The value of resistor RA changes with the specific IC used, due to the different reference voltages. The resistor values should be selected for minimal power loss. For example, a 50-µA bias current sets RB = 13 kΩ, and RA = 75 kΩ for UCCx813-[0,1,2,4] or RA = 56 kΩ for UCCx813-[3,5] devices.