SLUSCR9B June   2017  – December 2020 UCC28730-Q1

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Detailed Pin Description
        1. 7.3.1.1 VDD (Device Bias Voltage Supply)
        2. 7.3.1.2 GND (Ground)
        3. 7.3.1.3 HV (High Voltage Startup)
        4. 7.3.1.4 DRV (Gate Drive)
        5. 7.3.1.5 CBC (Cable Compensation)
        6. 7.3.1.6 VS (Voltage Sense)
        7. 7.3.1.7 CS (Current Sense)
      2. 7.3.2 Primary-Side Regulation (PSR)
      3. 7.3.3 Primary-Side Constant Voltage Regulation
      4. 7.3.4 Primary-Side Constant Current Regulation
      5. 7.3.5 Wake-Up Detection and Function
      6. 7.3.6 Valley-Switching and Valley-Skipping
      7. 7.3.7 Startup Operation
      8. 7.3.8 Fault Protection
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Stand-By Power Estimate
        2. 8.2.2.2 Input Bulk Capacitance and Minimum Bulk Voltage
        3. 8.2.2.3 Transformer Turns Ratio, Inductance, Primary-Peak Current
        4. 8.2.2.4 Transformer Parameter Verification
        5. 8.2.2.5 Output Capacitance
        6. 8.2.2.6 VDD Capacitance, CVDD
        7. 8.2.2.7 VS Resistor Divider, Line Compensation, and Cable Compensation
        8. 8.2.2.8 VS Wake-Up Detection
      3. 8.2.3 Application Curves
    3. 8.3 Do's and Don'ts
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Device Nomenclature
        1. 11.1.1.1  Capacitance Terms in Farads
        2. 11.1.1.2  Duty-Cycle Terms
        3. 11.1.1.3  Frequency Terms in Hertz
        4. 11.1.1.4  Current Terms in Amperes
        5. 11.1.1.5  Current and Voltage Scaling Terms
        6. 11.1.1.6  Transformer Terms
        7. 11.1.1.7  Power Terms in Watts
        8. 11.1.1.8  Resistance Terms in Ω
        9. 11.1.1.9  Timing Terms in Seconds
        10. 11.1.1.10 DC Voltage Terms in Volts
        11. 11.1.1.11 AC Voltage Terms in Volts
        12. 11.1.1.12 Efficiency Terms
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

VS Wake-Up Detection

The amplitude of the wake-up signal at the VS input must be high enough to be detected. This signal, which originates on the secondary winding, is limited by the impedances of the wake-up signal driver and the L-C resonant tank of the transformer windings. The signal is further attenuated by the VS divider resistors. To maximize the wake-up signal amplitude, the pulse width, tWAKE, of the wake-up signal should be at least 1/4-wavelength of the switched-node resonant frequency, fRES. The resonant frequency depends on the primary magnetizing inductance and the total equivalent capacitance at the switching node, that is, the primary-side MOSFET drain node. The switched-node capacitance, CSWN, includes the MOSFET COSS, the transformer winding capacitance, and all other stray circuit capacitance attached to the MOSFET drain. Use Equation 31 to determine fRES. Conversely, if fRES is known by experience or measurement, CSWN can be derived from Equation 31.

Equation 31. GUID-454DE49B-EC28-4C78-B549-B65C086C788B-low.gif

Since the wake-up pulse width is typically fixed by the driver device, such as the UCC24650, maximum signal strength is obtained when Equation 32 is true. Since LP is generally fixed by other system requirements, only CSWN can be reduced to increase fRES, if necessary.

Equation 32. GUID-388AC5DE-9794-47AB-8995-5126D063E186-low.gif

Equation 33 is used to ensure that there is sufficient amplitude at the VS input to reliably trigger the wake-up function, where RWAKE_TOT is the total secondary-side resistance of the wake-up signal driver and any series resistance. An over-drive of 15 mV is added to the wake-up threshold level for margin.

Equation 33. GUID-B1F04CB7-5ADA-4B4D-A78F-E77C8F533E60-low.gif