SLUSD12A October   2017  – February 2018 UCC28780


  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Simplified Schematic
      2.      45-W, 20-V GaN-ACF Adapter Efficiency
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information of SOIC
    5. 6.5 Thermal Information of WQFN
    6. 6.6 Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Detailed Pin Description
      1. 7.3.1 BUR Pin (Programmable Burst Mode)
      2. 7.3.2 FB Pin (Feedback Pin)
      3. 7.3.3 VDD Pin (Device Bias Supply)
      4. 7.3.4 REF Pin (Internal 5-V Bias)
      5. 7.3.5 HVG and SWS Pins
      6. 7.3.6 RTZ Pin (Sets Delay for Transition Time to Zero)
      7. 7.3.7 RDM Pin (Sets Synthesized Demagnetization Time for ZVS Tuning)
      8. 7.3.8 RUN Pin (Driver Enable Pin)
      9. 7.3.9 SET Pin
    4. 7.4 Device Functional Modes
      1. 7.4.1  Adaptive ZVS Control with Auto-Tuning
      2. 7.4.2  Dead-Time Optimization
      3. 7.4.3  Control Law across Entire Load Range
      4. 7.4.4  Adaptive Amplitude Modulation (AAM)
      5. 7.4.5  Adaptive Burst Mode (ABM)
      6. 7.4.6  Low Power Mode (LPM)
      7. 7.4.7  Standby Power Mode (SBP)
      8. 7.4.8  Startup Sequence
      9. 7.4.9  Survival Mode of VDD
      10. 7.4.10 System Fault Protections
        1. Brown-In and Brown-Out
        2. Output Over-Voltage Protection
        3. Over-Temperature Protection
        4. Programmable Over-Power Protection
        5. Peak Current Limit
        6. Output Short-Circuit Protection
        7. Over-Current Protection
        8. Thermal Shutdown
      11. 7.4.11 Pin Open/Short Protections
        1. Protections on CS pin Fault
        2. Protections on HVG pin Fault
        3. Protections on RDM and RTZ pin Faults
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application Circuit
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. Input Bulk Capacitance and Minimum Bulk Voltage
        2. Transformer Calculations
          1. Primary-to-Secondary Turns Ratio (NPS)
          2. Primary Magnetizing Inductance (LM)
          3. Primary Turns (NP)
          4. Secondary Turns (NS)
          5. Turns of Auxiliary Winding (NA)
          6. Winding and Magnetic Core Materials
        3. Clamp Capacitor Calculation
        4. Bleed-Resistor Calculation
        5. Output Filter Calculation
        6. Calculation of ZVS Sensing Network
        7. Calculation of Compensation Network
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 General Considerations
      2. 10.1.2 RDM and RTZ Pins
      3. 10.1.3 SWS Pin
      4. 10.1.4 VS Pin
      5. 10.1.5 BUR Pin
      6. 10.1.6 FB Pin
      7. 10.1.7 CS Pin
      8. 10.1.8 GND Pin
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|16
  • RTE|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Clamp Capacitor Calculation

There are two resonance approaches for an active clamp flyback (ACF) converter, primary resonance and secondary resonance, which affect the design guide on the clamp capacitor (CCLAMP). Referring to Figure 36, if CO1 serves as the energy-storage capacitor at the output with larger capacitance and CO2 is a high-frequency decoupling capacitor, leakage inductance of transformer (LK) mainly resonates with CCLAMP during the demagnetization time of the magnetizing inductance (LM). This configuration is called the primary-resonance ACF converter. On the other hand, if CO2 serves as the energy-storage capacitor at the output with larger capacitance and CO1 is much smaller than the equivalent capacitance of CCLAMP reflected to the secondary side (CCLAMP/NPS2), LK mainly resonates with CO1. This configuration is called the secondary-resonance ACF converter.

For primary-resonance ACF, the design tradeoff between conduction loss and turn-off switching loss of QH needs to be considered. Higher CCLAMP results in less RMS current flowing through the transformer windings and switching devices, so the conduction loss can be reduced. However, a higher CCLAMP design results in QH turning-off before the clamp current returns to 0 A. The condition of non zero current switching (ZCS) increases the turn-off switching loss of QH. This is aggravated if the turn-off speed of QH is not fast enough. Therefore, CCLAMP needs to be fine-tuned based on the loss attribution. If the resonance between LK and CCLAMP is designed to be completed by the time QH is turned-off, the clamp current should reach close to 0 A around three quarters of the resonant period. The following equation can be used to design CCLAMP for obtaining ZCS at VBULK(MIN) and full load. This design results in a non-ZCS condition at VBULK(MAX), since the switching frequency at VBULK(MAX) is higher in transition-mode operation. A low-ESR clamp capacitor is recommended to minimize the conduction loss. If a ceramic capacitor is used as the low-ESR capacitor, the DC bias effect on the capacitance reduction also needs to be considered.

Equation 35. UCC28780 Equ-Clamp-Max.gif

For secondary-resonance ACF, CO1 is used to adjust the resonance time with LK to fulfill the ZCS condition, so a large CCLAMP will not compromise ZCS. Besides, during the on-time of low-side switch (QL), the small CO1 is partially discharged by the load current at the same time. After QL turns off and the resonance begins, the discharged CO1 makes the initial resonance voltage lower than the reflected clamp capacitor voltage across CCLAMP, which forces more magnetizing current delivered to output, so the conduction loss is reduced with less RMS current flowing through QH and the primary winding.