SLUSD12A October 2017 – February 2018 UCC28780
The dead-time between PWMH falling edge and PWML rising edge (tZ) serves as the wait time for VSW transition from its high level down to the target ZVS point. Since the optimal tZ varies with VBULK, the internal dead-time optimizer automatically extends tZ as VBULK is less than the highest voltage of the input bulk capacitor (VBULK(MAX)). The circulating energy for ZVS can be further reduced, obtaining higher efficiency at low line versus a fixed dead-time over a wide line voltage range. A resistor on RTZ pin (RRTZ) programs the minimum tZ (tZ(MIN)) at VBULK(MAX), which is the sum of the propagation delay of the high-side driver (tD(DR)) and the minimum resonant transition time of VSW falling edge (tLC(MIN)).
where KTZ is equal to 11.2×1011 (unit: F-1) for VSET = 0 V, and 5.6×1011(unit: F-1) for VSET = 5 V. As illustrated in Figure 18, after PWMH turns off QH after tD(DR) delay, the negative magnetizing current (iM-) becomes an initial condition of the resonant tank formed by magnetizing inductance (LM) and the switch-node capacitance (CSW). CSW is the total capacitive loading on the switch-node, including all junction capacitance (COSS) of switching devices, stray capacitance of the boot-strap diode, intra-winding capacitance of the transformer, the snubber capacitor, and parasitic capacitance of the PCB traces between switch-node and ground. Unlike a conventional valley-switching flyback converter, the resonance of an active clamp flyback converter at high line does not begin at the peak of the sinusoidal trajectory. The transition time of VSW takes less than half of the resonance period. The following tLC(MIN) expression quantifies the transition time for RRTZ calculation, where an arccosine term represents the initial angle at the resonance beginning. The value of π minus the arccosine term at VBULK(MAX) of 375 V, VO of 20 V, and NPS of 5 is around 0.585π, which is close to one quarter of the resonance period.