There are three components in the application circuit to help the depletion MOSFET (Q_S) perform ZVS sensing safely: C_SWS, R_SWS, and D_SWS. Design considerations and selection guidelines for the values of these components are given here.

At the rising edge of the switch node voltage, the fast dV/dt coupling through the drain-to-source capacitance of Q_S (C_OSS(Qs)) generates a charge current flowing into the circuit loading on the Q_S source pin. The result is a possible voltage overshoot on both the SWS pin and across the gate-to-source of Q_S (V_GS(Qs)) since the gate is tied to P13. The SWS pin, with an absolute maximum voltage rating of 38 V, can handle higher voltage stress than V_GS(Qs). Therefore, a capacitor (C_SWS) between the SWS pin and GND should be selected properly to prevent the voltage overshoot from damaging the Q_S gate. Since C_OSS(Qs) and C_SWS form a voltage divider, the minimum C_SWS (C_SWS(MIN)) can be derived as

Equation 46.

where V_{GS_MAX(Qs)} is the de-rated maximum gate-to-source voltage of Q_S and V_P13 is the steady-state voltage level of 13 V.

Without resistive damping, both the charge current on the rising edge of V_SW and the discharge current on the falling edge of V_SW are oscillatory with the parasitic series inductance within the ZVS sensing network resonating with C_SWS. Therefore, a series resistor (R_SWS) between SWS pin and source-pin of Q_S is used to dampen any high-frequency ringing, helping to obtain a cleaner sensing signal on the SWS pin and preventing any high-frequency current from interfering with other noise-sensitive signals. R_SWS can be expressed as:

Equation 47.

where L_SWS is the lumped parasitic inductance including the packaging of Q_S and PCB traces of Q_S and C_SWS return path.

A bidirectional TVS across BSS126 gate and source should be added to protect the gate-to-source voltage from potential abnormal voltage stress. The clamping voltage of TVS should be less than BSS126 voltage rating but greater than 15 V. The resistor should be slightly higher than 500 Ω. The resistor and a 22-pF ceramic capacitor between the SWS pin and the bulk input capacitor ground form a small sensing delay to help the internal detection circuit to identify the ZVS characteristic correctly.

Based on the above design guide, even though R_SWS and C_SWS may be sufficient to manage the voltage overshoot in normal operation, a low-capacitance bi-directional TVS diode (D_SWS) across BSS126 gate and source is highly recommended to serve as a safety backup of the ZVS sensing network. Regular Zener diodes are not suitable due to high capacitance and slow clamping response. The clamping voltage of TVS should be less than BSS126 voltage rating but greater than 15 V.

A general recommendation is to use a 50-V 22-pF C0G-type ceramic capacitor for C_SWS, a 510-Ω chip resistor for R_SWS, and a bi-directional TVS diode with clamp voltage of 18 V for D_SWS. Too large of R_SWS or C_SWS introduces a sensing delay between the actual V_SW and the SWS pin, causing the ZVS control to unnecessarily extend t_DM in order to pull down V_SW earlier than expected before the end of t_Z . As shown in Figure 8-5, the larger R_SWS is, the smaller supply current to charge the VDD capacitor. If the reduced charge current (I_SWS) is lower than the total consumed current from the controller (I_START) and from the external circuitry on the VDD pin and P13 pin, V_VDD may not be able to reach V_VDD(ON) and the controller can not initiate any switching event.