SLUSDB2A August 2018 – December 2021 UCC28951
PRODUCTION DATA
The resistor R_{AB} from the DELAB pin, DELAB to GND, along with the resistor divider R_{AHI} from CS pin to ADEL pin and R_{A} from ADEL pin to GND sets the delay T_{ABSET} between one of outputs OUTA or OUTB going low and the other output going high Figure 7-1. The total resistance of this resistor divider should be in the range between 10 kΩ and 20 kΩ
This delay gradually increases as a function of the CS signal from T_{ABSET1}, which is measured at V_{CS} = 1.8 V, to T_{ABSET2}, which is measured at the V_{CS} = 0.2 V. This approach ensures there will be no shoot-through current during the high-side and low-side MOSFET switching and optimizes the delay for acheiving ZVS condition over a wide load current range. The ratio between the longest and shortest delays is set by the resistor divider R_{AHI} and R_{A}. The maximum ratio is achieved by tying the CS and ADEL pins together. If ADEL is connected to GND, then the delay is fixed, defined only by the resistor R_{AB} from DELAB to GND. The delay T_{CDSET1} and T_{CDSET2} settings and their behaviour for outputs OUTC and OUTD are very similar to the one described for OUTA and OUTB. The difference is that resistor R_{CD} connected between DELCD pin and GND sets the delay T_{CDSET}. The ratio between the longest and shortest delays is set by the resistor divider R_{AHI} and R_{A}.
The delay time T_{ABSET} is defined by the following Equation 3.
where
The same equation is used to define the delay time T_{CDSET} in another leg, except R_{AB} is replaced by R_{CD} (see Equation 4).
where
These equations are empirical and they are approximated from measured data. Thus, there is no unit agreement in the equations. As an example, assume R_{AB} = 15 kΩ, CS = 1 V and K_{A} = 0.5. Then the T_{ABSET} is approximately 90 ns.
In both Equation 3 and Equation 4, K_{A} is the same and is defined as Equation 5:
K_{A} sets how the delay varies with the CS pin voltage as shown in Figure 7-2 and Figure 7-3.
TI recommends starting by setting K_{A} = 0 and set T_{ABSET} and T_{CDSET} relatively large using equations or plots in this data sheet to avoid hard switching or even shoot through current. The delay between outputs A, B and C, D set by resistors R_{AB} and R_{CD} accordingly. Program the optimal delays at light load first. Then by changing K_{A} set the optimal delay for the outputs A, B at maximum current. K_{A} for outputs C, D is the same as for A, B. Usually outputs C, D always have ZVS if sufficient delay is provided.
The allowed resistor range on DELAB and DELCD, R_{AB} and R_{CD} is 13 kΩ to 90 kΩ.
R_{A} and R_{AHI} define the portion of voltage at pin CS applied to the pin ADEL (see Figure 8-3). K_{A} defines how significantly the delay time depends on CS voltage. K_{A} varies from 0, where ADEL pin is shorted to ground (R_{A} = 0) and the delay does not depend on CS voltage, to 1, where ADEL is tied to CS (R_{AHI} = 0). Setting K_{A}, R_{AB}, and R_{CD} provides the ability to maintain optimal ZVS conditions of primary switches over load current because the voltage at CS pin includes the load current reflected to the primary side through the current-sensing circuit. The plots in Figure 7-2 and Figure 7-3 show the delay time settings as a function of CS voltage and K_{A} for two different conditions: R_{AB} = R_{CD} = 13 kΩ (Figure 7-2) and R_{AB} = R_{CD} = 90 kΩ (Figure 7-3).