SLUS504H SEPTEMBER   2002  – January 2016 UCC27321 , UCC27322 , UCC37321 , UCC37322


  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description (continued)
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Power Dissipation Ratings
    8. 7.8 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Stage
      2. 8.3.2 Output Stage
      3. 8.3.3 Source and Sink Capabilities during Miller Plateau
      4. 8.3.4 Enable
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. Input-to-Output Configuration
        2. Input Threshold Type
        3. VDD Bias Supply Voltage
        4. Peak Source and Sink Currents
        5. Enable and Disable Function
        6. Propagation Delay
        7. Power Dissipation
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Information
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Related Products
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Related Links
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • P|8
  • DGN|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Detailed Description

8.1 Overview

The UCC37321 and UCC37322 drivers serve as an interface between low-power controllers and power MOSFETs. They can also be used as an interface between DSPs and power MOSFETs. High-frequency power supplies often require high-speed, high-current drivers such as the UCC3732x family. A leading application is the need to provide a high power buffer stage between the PWM output of the control device and the gates of the primary power MOSFET or IGBT switching devices. In other cases, the device drives the power device gates through a drive transformer. Synchronous rectification supplies must simultaneously drive multiple devices which can present an extremely large load to the control circuitry.

The inverting driver (UCC37321) is useful for generating inverted gate drive signals from controllers that have only outputs of the opposite polarity. For example, this driver can provide a gate signal for ground referenced,
N-channel synchronous rectifier MOSFETs in buck derived converters. This driver can also be used for generating a gate drive signal for a P-channel MOSFET from a controller that is designed for N-channel applications.

MOSFET gate drivers are generally used when it is not feasible to have the primary PWM regulator device directly drive the switching devices for one or more reasons. The PWM device may not have the brute drive capability required for the intended switching MOSFET, limiting the switching performance in the application. In other cases there may be a desire to minimize the effect of high-frequency switching noise by placing the high current driver physically close to the load. Also, newer devices that target the highest operating frequencies may not incorporate onboard gate drivers at all. Their PWM outputs are only intended to drive the high impedance input to a driver such as the UCC3732x. Finally, the control device may be under thermal stress due to power dissipation, and an external driver can help by moving the heat from the controller to an external package.

8.2 Functional Block Diagram

UCC27321 UCC27322 UCC37321 UCC37322 logic_options_01_lus504.gif

8.3 Feature Description

8.3.1 Input Stage

The IN threshold has a 3.3-V logic sensitivity over the full range of VDD voltages; yet, it is equally compatible with 0 V to VDD signals. The inputs of UCC3732x family of drivers are designed to withstand 500-mA reverse current without either damage to the device or logic upset. In addition, the input threshold turnoff of the UCC3732x has been slightly raised for improved noise immunity. The input stage of each driver must be driven by a signal with a short rise or fall time. This condition is satisfied in typical power supply applications, where the input signals are provided by a PWM controller or logic gates with fast transition times (< 200 ns). The IN input of the driver functions as a digital gate, and it is not intended for applications where a slow changing input voltage is used to generate a switching output when the logic threshold of the input section is reached. While this may not be harmful to the driver, the output of the driver may switch repeatedly at a high frequency.

Users should not attempt to shape the input signals to the driver in an attempt to slow down (or delay) the signal at the output. If limiting the rise or fall times to the power device is desired, then an external resistance can be added between the output of the driver and the load device, which is generally a power MOSFET gate. The external resistor may also help remove power dissipation from the device package, as discussed in Thermal Information.

8.3.2 Output Stage

The TrueDrive output stage is capable of supplying ±9-A peak current pulses; it swings to both VDD and GND and can encourage even the most stubborn MOSFETs to switch. The pullup and pulldown circuits of the driver are constructed of bipolar and MOSFET transistors in parallel. The peak output current rating is the combined current from the bipolar and MOSFET transistors. The output resistance is the RDS(ON) of the MOSFET transistor when the voltage on the driver output is less than the saturation voltage of the bipolar transistor. Each output stage also provides a very low impedance to overshoot and undershoot due to the body diode of the internal MOSFET. This means that in many cases, external-schottky-clamp diodes are not required.

This unique BiPolar and MOSFET hybrid output architecture (TrueDrive) allows efficient current sourcing at low supply voltages. The UCC3732x family delivers 9 A of gate drive where it is most needed during the MOSFET switching transition – at the Miller plateau region – providing improved efficiency gains.

8.3.3 Source and Sink Capabilities during Miller Plateau

Large power MOSFETs present a significant load to the control circuitry. Proper drive is required for efficient, reliable operation. The UCC3732x drivers have been optimized to provide maximum drive to a power MOSFET during the Miller plateau region of the switching transition. This interval occurs while the drain voltage is swinging between the voltage levels dictated by the power topology, requiring the charging or discharging of the drain-gate capacitance with current supplied or removed by the driver device.

Two circuits are used to test the current capabilities of the UCC3732x driver (see Reference (1)) . In each case external circuitry is added to clamp the output near 5 V while the device is sinking or sourcing current. An input pulse of 250 ns is applied at a frequency of 1 kHz in the proper polarity for the respective test. In each test there is a transient period where the current peaked up and then settled down to a steady-state value. The noted current measurements are made at a time of 200 ns after the input pulse is applied, after the initial transient.

The circuit in Figure 25 is used to verify the current sink capability when the output of the driver is clamped around 5 V, a typical value of gate-source voltage during the Miller plateau region. The UCC37321 is found to sink 9 A at VDD = 15 V.

UCC27321 UCC27322 UCC37321 UCC37322 sink_cur_test_lus504-2.gif Figure 25. Sink Current Test Circuit

The circuit in Figure 26 is used to test the current source capability with the output clamped to around 5 V with a string of Zener diodes. The UCC37321 is found to source 9 A at VDD = 15 V.

UCC27321 UCC27322 UCC37321 UCC37322 source_cur_test_lus504-3.gif Figure 26. Source Current Test Circuit

Note that the current sink capability is slightly stronger than the current source capability at lower VDD. This is due to the differences in the structure of the bipolar-MOSFET power output section, where the current source is a P-channel MOSFET and the current sink has an N-channel MOSFET.

In most it is advantageous that the turnoff capability of a driver is stronger than the turnon capability. This helps to ensure that the MOSFET is held OFF during common power supply transients which may turn the device back ON.

8.3.4 Enable

The UCC37321/2 provides an enable input for improved control of the driver operation. This input also incorporates logic compatible thresholds with hysteresis. It is internally pulled up to VDD with 100-kΩ resistor for active high operation. When ENBL is high, the device is enabled and when ENBL is low, the device is disabled. The default state of the ENBL pin is to enable the device and therefore it can be left open for standard operation. The output state when the device is disabled is low regardless of the input state. See Table 1 for the operation using enable logic.

ENBL input is compatible with both logic signals and slow changing analog signals. It can be directly driven or a power-up delay can be programmed with a capacitor between ENBL and AGND.

8.4 Device Functional Modes

Table 1 lists the logic of this device.

Table 1. Device Logic Table

0 0 0
0 1 0
1 0 1
1 1 0
0 0 0
0 1 0
1 0 0
1 1 1