SLUS492J June   2001  – September 2018 UCC27323 , UCC27324 , UCC27325 , UCC37323 , UCC37324 , UCC37325

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Simplified Application Diagram
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Stage
      2. 8.3.2 Output Stage
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Source/Sink Capabilities During Miller Plateau
        2. 9.2.2.2 Parallel Outputs
        3. 9.2.2.3 VDD
        4. 9.2.2.4 Driver Current and Power Requirements
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resource
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Thermal Information

THERMAL METRIC(1) UCCx732x UNIT
D
(SOIC)
DGN
(MSOP With PowerPAD)
P
(PDIP)
8 PINS 8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 107.3 56.6 55.5 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 52.2 52.8 45.3 °C/W
RθJB Junction-to-board thermal resistance 47.3 32.6 32.6 °C/W
ψJT Junction-to-top characterization parameter 10.2 1.8 23 °C/W
ψJB Junction-to-board characterization parameter 46.8 32.3 32.5 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A 5.9 N/A °C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.