Slope compensation is necessary to stabilise a converter operating in peak current mode at duty cycles greater than 50%. The optimum slope compensation ramp should be half the inductor current ramp downslope during the off time. This slope is calculated as follows:
The magnetizing current of the power transformer provides part of the compensating ramp and is calculated as follows. The VIN x DTYP factor takes account of the fact that the slope of the magnetizing current is less at lower input voltages.
The added slope compensation ramp is then:
The resistor RSC sets the added slope compensation ramp, mSUM and is chosen as follows:
A small AC coupling capacitor is used in the emitter of Q1 to eliminate the need for offset biasing circuitry. CC = 1 nF.
The resistor REL is a DC load resistor for the emitter of Q1. It should have the same value as RSC.
A small capacitor at the RAMP pin input helps suppress high frequency noise, we set CRAMP = 56 pF. Transistor Q1 is a small signal NPN type.
In peak current mode control the RAMP pin receives the current sense signal, plus the slope compensation ramp, through the 510-Ω resistor RRCS. The 10-kΩ resistor RRB provides approximately 250-mV offset bias. The value of this resistor may be adjusted up or down to alter the point at which the internal no load comparator trips.