When parasitic inductances are introduced by nonideal PCB layout and long package leads (such as TO-220 and TO-247 type packages), ringing in the gate-source drive voltage of the power transistor could occur during high di/dt and dv/dt switching. If the ringing is over the threshold voltage, unintended turnon and shoot-through could occur. Applying a negative bias on the gate drive is a popular way to keep such ringing below the threshold. A few examples of implementing negative gate-drive bias follow.
Figure 60 shows the first example with negative bias turnoff on the output using a Zener diode on the isolated power-supply output stage. The negative bias is set by the Zener diode voltage. If the isolated power supply is equal to 20 V, the turnoff voltage is –5.1 V and the turnon voltage is 20 V – 5.1 V ≈ 15 V.
Figure 61 shows another example which uses two supplies (or single-input, double-output power supply). The power supply across VCC2 and GND2 determines the positive drive output voltage and the power supply across VEE2 and GND2 determines the negative turnoff voltage. This solution requires more power supplies than the first example, however, it provides more flexibility when setting the positive and negative rail voltages.