SLLSER8F June 2017 – January 2019 UCC5310 , UCC5320 , UCC5350 , UCC5390
PRODUCTION DATA.
The external gate-driver resistors, R_{G(ON)} and R_{G(OFF)} are used to:
The output stage has a pullup structure consisting of a P-channel MOSFET and an N-channel MOSFET in parallel. The combined peak source current is 4.3 A for the UCC5320 family and 17 A for the UCC5390 family. Use Equation 1 to estimate the peak source current using the UCC5320S as an example.
where
In this example, the peak source current is approximately 1.8 A as calculated in Equation 2.
Similarly, use Equation 3 to calculate the peak sink current.
where
In this example, the peak sink current is the minimum of Equation 4 and 4.4 A.
NOTE
The estimated peak current is also influenced by PCB layout and load capacitance. Parasitic inductance in the gate-driver loop can slow down the peak gate-drive current and introduce overshoot and undershoot. Therefore, TI strongly recommends that the gate-driver loop should be minimized. Conversely, the peak source and sink current is dominated by loop parasitics when the load capacitance (C_{ISS}) of the power transistor is very small (typically less than 1 nF) because the rising and falling time is too small and close to the parasitic ringing period.