SLUSB72D March 2013 – April 2021 UCD3138064
The DPWM module has the capability to trigger an over sampling event by initiating the EADC to sample the error voltage. The default “00” configuration has the DPWM trigger the EADC once based on the sample trigger register value. The over sampling register has the ability to trigger the sampling 2, 4 or 8 times per PWM period. Thus the time the over sample happens is at the divide by 2, 4, or 8 time set in the sampling register. The “01” setting triggers 2X over sampling, the “10” setting triggers 4X over sampling, and the “11” triggers over sampling at 8X.